Why would you set it (vsoft) to 10V below the supply rails? That's clearly not going to work (clear if you read the model). In fact, why don't you just use a comparator model (there's one in ahdlLib and also one at https://designers-guide.org/verilog-ams/index.html ) rather than trying to use a general opamp model that you don't understand? Regards, Andrew.
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