Just to be sure that we are talking the same thing, The passive power I believe is the logic gate power consumption for certain input pin conditions. For example for NAND gate, passive power is calculated in these conditions: A1/A2 = inputs Y = output Passive power A1 rising when A2 & Y Passive power A1 falling when A2 & Y and also for the second pin (A1) when A2 is rising or falling
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