Dear KenKim, [quote userid="491776" url="~/cadence_technology_forums/f/custom-ic-design/47005/differential-pair-measurement/1370071"]What I meant was a differential voltage measurement between the cap node( node that touches the Gate and Drain of the FETs) and VSS. [/quote] Thank you for the added information. It still seems all you need to do is define an output signal whose voltage is between your node "cap" and your node "VSS". Am I still overlooking your issue? I apologize if I am! Shawn
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