Dear jeff, [quote userid="327351" url="~/cadence_technology_forums/f/rf-design/49427/sampled-pnoise-on-multi-phase-switched-cap-circuit/1379357#1379357"]I am much more care the noise density when load cap is 1pF for one switch vs. two switches. [/quote] In this case, your output noise will be subject to aliasing since the RC bandwidth is far greater than 5 MHz. The aliasing will produce noise frequencies that are non-linear in nature. and will NOT behave as KT/C noise. [quote userid="327351" url="~/cadence_technology_forums/f/rf-design/49427/sampled-pnoise-on-multi-phase-switched-cap-circuit/1379067#1379067"]if RC << Ton, KT/C noise will be on the output, and noise density is sqrt (KT/C*2/fund)[/quote] and then you state: [quote userid="327351" url="~/cadence_technology_forums/f/rf-design/49427/sampled-pnoise-on-multi-phase-switched-cap-circuit"]how can I simulate the circuit to get the right noise density (4kTR*pi/2*f3db/fs), instead of 4kTR*pi/2*f3db*2/fs? is pnoise option "sampleratio" [/quote] It is not clear to me that the noise density can be assumed to be linear with number of switches in parallel - aliasing is a non-linear process. When I read these comments in your prior posts, this was why I have a feeling your basic assumption is incorrect. [quote userid="327351" url="~/cadence_technology_forums/f/rf-design/49427/sampled-pnoise-on-multi-phase-switched-cap-circuit/1379357#1379357"]can you explain more on the results on page 29 and 32? why there looks 2x difference in noise density? and total integrated noise are different too?[/quote] I have attached these two pages for your convenience as Figure 2. Focusing on the green curves which are the Fourier components of the sampled node (vres_sampled), the behavior of the two data sets as a function of frequency are fundamentally different with the difference being due to the effects of aliasing since the -3 dB bandwidth of your low-pass filter in this case is: ff-3 = 1/(2*pi*1K*1 pf) = 159.2 MHz (RC = 1e-09) and the sampling frequency is only 10 MHz (Ton = 1/10MHz = 1e-07) The vres_sampled output noise, when integrated between 100 kHz and the Nyquist frequency of 5 MHz, for the single switch case is shown as 47.6 uV while that for the case with two switches in paralllel (but whose control signals are non-overlapping) is observed to be 26.2 uV. The difference between the two integrated noise voltages is not exactly a factor of 2 as is, to my understanding, your basic assumption Jeff I also summarized the integrated noise voltage in a table for each load capacitor and switch type on page 35 of the note which I include as Figure 3. Shawn Figure 2 Pages 29 and 32 of URL: https://ent.box.com/s/epe7cskp6habzk4yrt2nc945q95iwn3a community.cadence.com/.../p29_5F00_p32.pdf Figure 3 Page 35 of URL: https://ent.box.com/s/epe7cskp6habzk4yrt2nc945q95iwn3a
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