Forum Post: Simulation with verilog-a model

I am trying to simulate a memristor model and check basic operations. I got memristor source code written with verilog-a(below). module memristor (p, n) ; inout p, n ; electrical p, n ; parameter real uv = 10f; parameter real d = 10n; parameter real ron = 100; parameter real roff = 38k; parameter real rin = 5k; real k, r1, r2, R; analog begin k = 2 * uv * ron * (roff - ron) / pow(d,2); r1 = pow(rin,2) + k * idt( V(p,n), 0 ); r2 = min( pow(roff,2) , max(r1,pow(ron,2) ) ); R = sqrt(r2); V(p,n) <+ R * I(p,n) ; end endmodule And I created a cellview to add sin wave voltage source like below. But when I simulated above module with ADE XL, Result is Memristor has a constant resistance rin(of above code). I think idt(...) of the code does not work. Should I do something more when simulate with verilog-a module? Thank you.