bmsLib and ahdlLib both contain sample models for some common building blocks used in designs. ahdlLib contains only verilog-A models, while bmsLib contains verilogA and verilog-AMS models for mixed-signal design. The choice between verilog-A and verilog-AMS models depends on how you'd like to model your systems. Verilog-A models allow only analog behavioural modelling i.e. all signals have electrical behaviour, so if you use these, you can continue using Spectre as the simulator (ams not needed), although the simulation will work with 'ams' as well. In verilog-AMS views, you can model digital and analog behaviour together in the same module e.g. you might need to define control registers (digital) in your block. When using verilog-AMS models, you will have to use 'ams' as the simulator. You will also need Incisive or Xcelium tools in your installation path. Using 'ams' as the simulator means that the digital content of your models will be solved by an event-driven digital kernel in the ams simulator, while the analog part will still be solved by Spectre/APS, however this version of Spectre will be used from Incisive/Xcelium. There are language reference manuals on both verilog-A and verilog-AMS which you can find on support.cadence.com. These manuals contain examples that you will find useful. Regards, Saloni
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