Quantcast
Channel: Cadence Technology Forums
Browsing all 62729 articles
Browse latest View live
↧

Forum Post: RE: Allegro screen white out

Since this appears to be a Windows Update issue, has anybody tried to resolve it using the Windows Update Troubleshooter....

View Article


Forum Post: RE: Stacked Vias

Thanks a lot Andrew. I admit I hadn't gone through the guidelines. I will follow them in the future :). I was able to solve my problem. Best regards, Adi

View Article


Forum Post: RE: Calculate input impedance for matching with spectreRF

Hi Vipul, There is a chapter in the SpectreRF User Guide that you should take a look at: analogLib Components Used in RF Simulation. You'll want to look at the port component, specifically terminating...

View Article

Forum Post: RE: create custom via and save it

Hi Andrew, Thanks for this valuable information. How can i perform this action "(you could always create your design library to reference the technology library rather than attaching it, and then you...

View Article

Forum Post: RE: Allegro screen white out

Yes we're currently experiencing it. On several computers now. Unfortunately no response from Cadence on how to resolve it. I submitted a CS last December 2016 but no resolution so far. We're running...

View Article


Forum Post: RE: Calculate input impedance for matching with spectreRF

HI Vipul, One more thing...please feel free to contact Cadence Customer Support and submit a request (CCR) to enhance impedance matching in the GUI.

View Article

Forum Post: RE: Could DRC find out single nets in ORCAD?

Does anybody have an answer for the blank window in "configure Custom DRC"?

View Article

Forum Post: RE: create custom via and save it

Hi Priyankar, OK, there are several things to answer here. First of all, you didn't mention that the File->Close Data failure was related to when you saved to the technology library. If you save to...

View Article


Forum Post: RE: Allegro screen white out

We are also experiencing the same issue. Using windows 7. Same workaround No response from cadence

View Article


Forum Post: SVA: What is supported and what is not...

Hi, I am trying to get a handle on what features of SV 2009 are unsupported. As an example, I was trying to use the $inferred_clock and $inferred_disable keywords, and getting compilation errors. Can...

View Article

Forum Post: RE: create custom via and save it

Thanks Andrew for detailed information and the SKILL Code. Is there a way that i can save the via variant and use it across all the design libraries in my cds.lib ? because by the SKILL code which you...

View Article

Forum Post: RE: create custom via and save it

Priyankar, The only way you can do this is to save the via variant into a technology library (e.g. an incremental technology library) that you have write access to, and which all the design libraries...

View Article

Forum Post: Make Changes to Layout Without Libraries

I have a unique problem that I'm hoping someone else has encountered and solved. I want to make a simple change to a completed Allegro board file from a defunct division of our company, but have none...

View Article


Forum Post: RE: Make Changes to Layout Without Libraries

If the old and new component have the same number of pins and pin numbers you could rename your component to match the old component then refresh the symbol in the design. If you need to move nets...

View Article

Forum Post: RE: Allegro screen white out

To be fair, I am not sure what the Cadence folks are going to be able to do about this issue in terms of a "quick fix" since the common denominator seems to be that "Windows applied an update" as the...

View Article


Forum Post: RE: Make Changes to Layout Without Libraries

Thanks, Mike. Unfortunately the new component has many more pins even though it connects to the same nets as the old. Given this, what would be your suggestion?

View Article

Forum Post: foot print

I am having trouble to import my custom dxf file as the foot print for orcad pcb editor

View Article


Forum Post: RE: foot print

By the way, this is the dxf file I would like to create

View Article

Forum Post: RE: Could DRC find out single nets in ORCAD?

You need to install hotfix.

View Article

Forum Post: RE: Calculate input impedance for matching with spectreRF

Hi Tawna Thanks for the reply. I am not sure but I think looking at the reflection coefficient (Zin-Zsor)/(Zin+Zsor) shoule be the best way of measuring impedance matching and could not find any such...

View Article
Browsing all 62729 articles
Browse latest View live


<script src="https://jsc.adskeeper.com/r/s/rssing.com.1596347.js" async> </script>