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Forum Post: RE: Add an item ADE-XL results tab (when right clicking on a test...

Hello Andrew, Which session? Well... the code you wrote above has a line like ?callback (abHiSaveViolationsToHTML ',session) that is the session I pass to asiGetPsfDir (and asiGetResultsPsfDir behaves...

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Forum Post: RE: Verilog Netlister compatible net-separator in OA ?

Hi Andrew, Thanks a lot. Just tried to create a schematic applying the patch to the 3 tapped bus_a signals. All interfaces are of direction-type "inout". I am attaching the snapshot. For this...

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Forum Post: RE: Add an item ADE-XL results tab (when right clicking on a test...

Hi Patrick, Sorry, I was being a bit dumb. The session passed in to the callback is a "sev" session, and from that you need to get the "asi" session to be able to use the asi (Analog Simulation...

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Forum Post: RE: Unconnected Pins Report says through hole in pad not...

Hi oldmouldy, thanks for the reply. I am using 17.2.s001. I tried the database check, but to no avail... In the zip file is a snip of the 3D view showing the holes connecting to the ground plane, same...

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Forum Post: how to write a SKILL code for PCELL powergrid

Hi all, I am new to SKILL coding. I am trying to create a power grid PCELL using SKILL. The user can switch on and off layers/vias depending on needs. I found some SKILL code online and modified to...

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Forum Post: RE: Unconnected Pins Report says through hole in pad not...

It does not get connected because you do not have a Regular Pad feature on the internal layers

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Forum Post: RE: how to write a SKILL code for PCELL powergrid

Hi Rudy, You need to create a PCell parameter to match the CDF parameter that you created, so call it visibilityM3, and you need to also pass this as an argument to the drawing function. You can...

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Forum Post: RE: Re-organize schematic page tabs in Capture

Add a numerical prefix to your page names such as 01_, 02_, 03_ etc

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Forum Post: RE: how to write a SKILL code for PCELL powergrid

Hi Lawrence, Thank you so much. i believe i am one step closer to the solution. I added the above code to my code and it compiles successfully. however, when i unchecked the M3 box, and click OK/Apply....

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Forum Post: RE: how to write a SKILL code for PCELL powergrid

Hi Rudy, I've not played with boolean CDF parameters for a while but the important thing is how the value is stored/communicated to the PCell - I assumed it will be a string but it could be a true...

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Forum Post: Create an additional layer for layout

I want to create and additional layer for layout and define its design rules for a specific process technology that I will be working with. For example, I want to create a layer between M1 and M2. Can...

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Forum Post: RE: Unconnected Pins Report says through hole in pad not...

Hmmm... I thought I had tried that - I modified the padstack to define the Default Internal pad, then updated the symbol... I must not have refreshed the padstack... Thank you so much for your help!

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Forum Post: RE: Re-organize schematic page tabs in Capture

Thanks. I had already done what you had suggested. However, I wanted to move a Page Tab once the page was already opened. That is for example if Pg 1, Pg 2 and Pg 4 were opened and then I open Pg 3, it...

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Forum Post: PGtext in nograph mode

Is there a way to generate polygon text like the PGtext.il SKILL code, in nograph mode?

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Forum Post: RE: PGtext in nograph mode

Yes, this is possible of course. I have no idea which "PGtext.il" you're referring to, so I don't know whether the code supports doing this without a graphical environment or whether the code would...

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Forum Post: RE: Create an additional layer for layout

Hi Sherif You can try the following: a. In CIW, go to "Tools->Technology File Manager" b. A small form appears. Click on "Dump" c. Select all techfile sections to be dumped and specify a filename...

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Forum Post: RE: CONV skill

You should find this row sprintf(mm "%.2f" , mm) and change it to sprintf(mm "%.4f" , mm)

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Forum Post: Current starved delay element

I'm using a current starved delay cell and need to plot the control voltage (the voltage applied to control the delay) versus the delay of the cell. i mean , V control - x Axis delay - y axis any...

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Forum Post: CIP

We installed CIP a few weeks ago but haven’t worked out all of the details yet. We imported the data from our Microsoft Access database into SQL. I have it setup on my computer but haven’t pushed it...

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Forum Post: Cadence virtuoso tool related

I am using Cadence virtuoso 6.1.5. I am required to measure the SNR at the input and output of some Analog Circuits simulated at Nyquist rate, using Spectral Analysis. When measured for an ideal...

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