Forum Post: RE: How to make shape to attach to pads
Thank you UlfK, Pin - Edit/Properties Dyn_Thermal_Con_Type - Full Contact Did the trick!!! Thanks!!!!
View ArticleForum Post: LVS error while connecting bulk with source
Hi, I am drawing the layout of a schematic. Here for certain PMOS the bulk is connected to the source and both together connected to the voltage source. Now in the layout, I have drawn two voltage...
View ArticleForum Post: RE: Need an advise: which is the most continent way to save...
Vadim, I'm not sure anyone here can answer that. Doesn't this rather depend on what you want to do with the file you're generating? Andrew.
View ArticleForum Post: RE: How to extract Pcell proprieties from a CV
In that case you'd need to visit all the instances rather than the instHeaders. You would need to look at each instance's master and then check to see if it has a superMaster (then you know it's a...
View ArticleForum Post: RE: "Report Parasitics" cannot be Clicked
This is a bug that was just in that subversion and is described in this support article . IC616 ISR12 was fixed. There's a workaround described in the article which was to use the following steps:...
View ArticleForum Post: RE: ADEXL Test Setup using Skill and asiGetSession Failure
Curtis - yes, this looks reasonable! Ah, just seen your last question. That's easy enough: asiSetKeepOptionVal(testSession 'save "selected") asiSetKeepOptionVal(testSession 'currents "selected")...
View ArticleForum Post: RE: How to make shape to attach to pads
You don't really need the connect lines from the SMT pads to the vias any longer. Why don't you play around with the other DYN properties for pins to see how you can control things? For instance. If...
View ArticleForum Post: Import spice netlist to Virtuoso
Hi I ma not sure this question is suitable for this forum. I want to import spice netlist into Virtuoso. Is there any application note or user guide for the conversion ? I need to map devices in spice...
View ArticleForum Post: RE: how to write a SKILL code for PCELL powergrid
Thanks alot for your suggestion. it works now. true boolean gets pass into the function. I can now turn on/off metal layers created using rectRodObj. however, when i do the same for VIA using...
View ArticleForum Post: Wire-only Primitives
What is the best flow for inserting a wire-only primitives into a design? I define a wire-only cell as a cell that only contains metal layers and vias not diffusion/poly layers (no transistors), and...
View ArticleForum Post: Renaming multiple signal names in Design Entry HDL 16.6
I have a few signals that I need to change part of the name of each signal. The signals are currently named J3_PIN_1, J3_PIN_2 ... up to J3_PIN_108. I need to replace the "J3" part of the name with...
View ArticleForum Post: RE: Renaming multiple signal names in Design Entry HDL 16.6
It's been a long time since I've been on Concept (aka DE HDL) but it used to save the schematic pages as ASCII. The original tool was Unix based and there was a script for everything...that said I...
View ArticleForum Post: RE: how to write a SKILL code for PCELL powergrid
Rudy, You didn't show any of the code that actually does the conditional part (as far as I can see), so I'm not sure how anyone can help you. It can't be anything to do with the fact that you're...
View ArticleForum Post: RE: Import spice netlist to Virtuoso
There's this article on support.cadence.com . The key part is generally coming up with the device mapping file which gives the rules on how to map the devices to PDK devices. Regards, Andrew.
View ArticleForum Post: RE: ALT+key shortcuts are not available in 17.2 also on the...
HotFix 11 are released, very well. But "The BUG remains the same !" ALT+key shortcuts are NOT available ! It's incredible .. after many months this bug remains NOT fixed ! The ease of use are...
View ArticleForum Post: RE: Renaming multiple signal names in Design Entry HDL 16.6
This would need to be done for each page, but it's fairly quick. In the DEHDL console window, type - "find SIG_NAME=J3_PIN*". Then type "change A". They type CTRL-E. This launches a text editor and you...
View ArticleForum Post: RE: Convert Altium Designer SchDoc to Capture CIS
Elgris Technologies, Inc has its own Altium->OrCAD schematic translator. If there are issues in Altium Importer provided with OrCAD, then check about Elgris's solution. Elgris has its own...
View ArticleForum Post: RE: How to get the lowerLeft & upperRight coordinate from 4000 or...
Hi Andrew, Yes, It works. You are great. Thank you, Charley
View ArticleForum Post: probe different point on power nets in av_extracted view
Hi, In my design there are multiple hierarchy and i have done the av_extraction at the top level now i want to power net at the lowest level but i am not able to do so can you pls guide me on how to do...
View Article