Forum Post: RE: DRC error on regulator output
Have you tried setting the pin type to "POWER" (and visible)? POWER to POWER is acceptable. Output to POWER should cause a DRC since any general output should not be tied directly to a power rail. You...
View ArticleForum Post: RE: Storing config of a cell in a file/cellview
The other thing you can also do with the Variables and Parameters assistant is save sets of variable/parameter values (or sweeps) to a "setup state". That's the box and icons at the top of the image...
View ArticleForum Post: RE: Problem saving intrinsic parameters using save statement save...
When you use save NM0. nm_hp :all the nm_np has to refer to the instance name within the subckt not the subckt name. So you need to look in the definition of nm_hp and see what the instance name is...
View ArticleForum Post: RE: when is .cdsinit.local loaded?
There is nothing in virtuoso that loads a file called ".cdsinit.local". All that happens is that virtuoso looks for a file called ".cdsinit" (in various places; the order of which can be overridden...
View ArticleForum Post: RE: Calibre LVS errors for a design generated in Encounter
Thank you Kari I would like to know how to check if all std cells pins are connected, how to do that ? I think connectivity violations check doesn't check power/ground connections of std cells, does it ?
View ArticleForum Post: How to make an ideal diode model for diode from analogLib?
I am trying to make a model and use it for ideal diode from analogLib library. However, I don't know how to modify the built-in potential (or forward voltage) of the diode. I tried to add VJ variable...
View ArticleForum Post: RE: Align pins based on connectivity
Hi Ramakrishnan You can do it as follows using the "Pin Placer" function: a. Switch to layoutXL using "Launch->Layout XL" b. Ensure that there are flight lines linking the top level pins to the pins...
View ArticleForum Post: RE: SKILL descend into a component sub-circuit schematic
Hi Aleksandr Perhaps you are looking for "dbGetAnyInstSwitchMaster"? Please refer to $CDSHOME/doc/skdfref/skdfref.pdf. You can actually just use dbOpenCellViewByType repeatedly too. E.g. if you know...
View ArticleForum Post: RE: SKILL descend into a component sub-circuit schematic
Hi Quek, Thanks for the reply. I'll look up the "dbGetAnyInstSwitchMaster", but if repetitive "dbOpenCellViewByType" works as well, I'd rather use that. Thanks, Aleksandr
View ArticleForum Post: QRC extraction problem
Hi all: I'm at QRC stage now where I have encountered this extraction problem: Cadence Extraction QRC - 64-bit Parasitic Extractor - Version 13.2.0-s451 Tue Jul 22 19:35:08 PDT 2014...
View ArticleForum Post: RE: How to make an ideal diode model for diode from analogLib?
The diode model is not intended to be used as an "ideal" diode, so I don't think that's you're best starting point. Note - this comes with a bit of caution; modelling "ideal" components is often not a...
View ArticleForum Post: RE: QRC extraction problem
Turn this switch off on the QRC form: The default behaviour is that it checks that all devices referenced in the QRC setup can be found, regardless of whether they are used in your layout. With this...
View ArticleForum Post: RE: QRC extraction problem
Thanks Andrew I have done this. Now there comes another error: ------- Cadence Extraction QRC - 64-bit Parasitic Extractor - Version 13.2.0-s451 Tue Jul 22 19:35:08 PDT 2014...
View ArticleForum Post: RE: QRC extraction problem
Umais, I'm not sure what you mean "when I try to open the file". Open with what? I'd check what "ls -l /lib64/libtermcap.so.2" shows, and also "ls -lL /lib64/libtermcap.so.2". These libraries should...
View ArticleForum Post: RE: How to make an ideal diode model for diode from analogLib?
Thank you, Andrew Beckett! You are right I tried some ideal components before and faced convergence problem. For the diode, I don't need it to be perfectly idea but something close to that. However, as...
View ArticleForum Post: how to prevent highlight done by highlight_timing_report
Hi, Tool: Innovus When a new highlight_timing_report command is issued, the previous highlight is automatically de-highlighted. I want to keep previous highlight and "add" new highlights. Please...
View ArticleForum Post: RE: when is .cdsinit.local loaded?
Thanks Andew! Indeed this is customized settings from the CAD team, where loading .cdsinit.local file is defined in .cdsinit It seems that .cdsinit is the only place to define any customized settings,...
View ArticleForum Post: iPad files manager
you can retrieve data by yourself. There are programs to do that. For example Ipad Manager I used it few times. it's free and it works as good as can be expected. The main thing is to stop using the...
View ArticleForum Post: Dimming on layout window any given area?
Hi Andrew, Thanks actively helping us. I have question like this, we can do "dimming" on layout windows, through display options. We can do dimming based for conditions ie scope. However is there any...
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