Forum Post: RE: Test Your Know How: PCB Separation
In reply to this we would like to publish our results: 1. Speed => A. Scoring 2. Cost => C. Lazer Cutting 3. Stress => A. Scoring Scored PCBs are separated using dual "pizza slicer" blades....
View ArticleForum Post: RE: How to extract SMT lumped inductors and capacitors from a...
Yes, I originally intended to make the surface mount part of the extraction because the detailed SMT values or models are not fixed. I tried to upload some screenshots, but an error occurred on this...
View ArticleForum Post: (Cadence) Allegro Free Physical Viewer - Measure Question
Hello, I've recently been using the free Allegro viewer in attempts to take measurements off of a PCB drawing I'm working on. It seems they have excluded the measure functions from the Viewer or at...
View ArticleForum Post: Congestion at Routing Stage
I'm seeing congestion at the routing stage. I'd truly appreciate it if someone could guide me on what my approach should be and which things I should take care of to address this congestion issue at...
View ArticleForum Post: Min Pulse Width Violation
How do we address if there is a Minimum Pulse Width violation in the design?
View ArticleForum Post: RE: Importing parameter file does not change units to mm?
I am using 24.1-2024 P001
View ArticleForum Post: RE: Latency to Connect License server
Hi Tarique, You will still need LM_LICENSE_FILE for using any non-Cadence applications. By setting the variable CDS_LIC_ONLY, Cadence applications will check the license servers defined in CDS_LIC_FILE...
View ArticleForum Post: RE: (Cadence) Allegro Free Physical Viewer - Measure Question
Hi Cory CR202507165038 , you can type "show measure" command in the Free Viewer's command window and it will give you option of snap(to center,vertex etc) in your right mouse button.
View ArticleForum Post: The current direction is different after simulation with...
Hi,friends After extracting the dspf file with calibre, the current flowing through the S terminal of the mos tube with 2 fingers inside, one finger Isource is negative and one finger Isource is...
View ArticleForum Post: RE: PSpice only schematic symbol pins
PSpiceOnly set to true OR NETLIST_IGNORE properties can be used to restrict any part going into netlist depending on your requirement. You can refer following link for more details: (+) Capture to...
View ArticleForum Post: RE: Panning acceleration/gearing in 24.1
Hello DenzilPenberthy , I don;t think there is way to change panning functionality apart from going to dehdl one. I have checked in 24.1, hotfix 5 and it works fine for me. Check if you have updated...
View ArticleForum Post: Display Top Ranked Results from Text File in Assembler Output Tab
Hi, After running certain flows, a space-separated text file is generated containing results. I would like to: Read this file, Process the data into a structured table, Rank the entries based on one of...
View ArticleForum Post: Problems with genvar and nested for loops in verilog-A after...
Hi everyone, I recently updated several Cadence tools due to end-of-life notices for the versions we were using. After the upgrade, Virtuoso and Spectre launch without issue, but I’m now encountering a...
View ArticleForum Post: Idea for improvement with file-import-logo feature
The file-import-logo feature is accessible in the symbol editor of Allegro/Orcad PCB editor. It is old and improvements would be appreciated. The feature accepts only bmp file. It convert the logo...
View ArticleForum Post: information about (description of) gsclib045 components?
Is there a document that explains what each cell in gsclib045 does, and how? I can tell (in the most general terms) that something like AND3X8 is an "and" gate, has 3 inputs, and has X8 output...
View ArticleForum Post: VIVA: Change color/disable highlighting around current (sub-)window
Hi! Is is possible to change the color or disable the red highlighting around the current (sub-)window? For documentation purposes I need to take snapshots like the one below, and would like to get rid...
View ArticleForum Post: spectre assert
Hi, can anyone tell me how to exclude subckts in spectre assert statement? Just like "xsubckt=..." in checklimit statement or any other... Thanks, Joe
View ArticleForum Post: RE: VIVA: Change color/disable highlighting around current...
Hi Jorge, Why don’t you use File->save image (or export image - I forget what the menu is called)? Andrew
View ArticleForum Post: RE: Some comments regarding Cadence (OrCAD/Allegro) Documentation...
Been spending too much time on Italian Brainrot Clicker lately, but jumping back into Cadence docs just reminded me of one thing - why the dark mode in the PDFs?? My printer is crying. Would love to...
View ArticleForum Post: Export to CSV efficiently? (code review)
I wrote this function to export a list to a generated CSV file. However the for loop takes hours to run (albeit I am exporting 100,000+ items, but still, the commands that generate these items change...
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