Forum Post: RE: Translating from PADS
I tried the DXF, but it was awful. But, that's usually just the quality of the DXF data and not the import process, itself. The lines are part of a company logo that is now in the PADS library as a 2D...
View ArticleForum Post: Preventing the config view from defaulting to AMS
When I load the config view it defaults to the AMS simulator and not spectre. I've set the environment variable "asimenv.startup simulator" to spectre but the config view overrides it, is there a way...
View ArticleForum Post: RE: Preventing the config view from defaulting to AMS
Use: hed.ade setAmsSimulator boolean nil or from SKILL: envSetVal("hed.ade" "setAmsSimulator" 'boolean nil) When the ADE button in the hierarchy editor was first added, it was added for AMS users and...
View ArticleForum Post: Is it possible to define interchangeable part numbers in a BOM?
In our products we would like to be able to select interchangeable parts. Let me discuss quickly why this is useful and our motivation. We may want to allow purchasing of two parts for lead time...
View ArticleForum Post: RE: Find missing SilkScreen RefDes on board design
Hi Dave! It seems like this is a 32bit context. Do you have a 64bit version?
View ArticleForum Post: RE: Find missing SilkScreen RefDes on board design
community.cadence.com/.../2804.AutosilkUtils_5F00_public.17.2_5F00_12.30.cxt.zip
View ArticleForum Post: how to delete via cell in the design
Hi, Two questions: 1) Does anyone know how to remove via cell from the design?? These are in the design but NOT from LEF. 2) Also once you add NDR rule. Is there a way to remove it in the db?? Thanks,...
View ArticleForum Post: Liberate_AMS for .lib generation.
Hi, I'm having Liberate_AMS for characterization of AMS blocks. Can I use the same for the characterization of a std cell library ? The main difficulty involved is in generating the input stimulus...
View ArticleForum Post: RE: Convert M1 bBox coordinates inside a hierarchy to upper...
Thanks Andrew so much! :)
View ArticleForum Post: using auto-vias through SKILL
I have a list of bBoxes of path shapes of 0.05um width (M1, M2, M3 overlapping/stacked on each other) in my current hierarchy. I have dbIDs of shapes as well. I tried to use function...
View ArticleForum Post: RE: Liberate_AMS for .lib generation.
Liberate_AMS does one cell characterisation in each run. It is for AMS/Analog block or large IO block characterisation. For standard cell characterisation, Liberate is the right choice, which can...
View ArticleForum Post: how to customize right click menu in adexl data view window and...
Hi, I am using adexl to run analog design. In general, there are many functions in the right click menu in the data view window, when you right click your test name. At the same time, I find the output...
View ArticleForum Post: decrease list of lists by 1 hierarchy list
i have a list named A in this format: ( (((x1) (y1))) (((x2)(y2))) (((x3)(y3))) ) But i have to decrease its listing hierarchy by 1, ie. i want a format like this: ( ((x1)(y1)) ((x2)(y2)) ((x3)(y3)) )...
View ArticleForum Post: Virtuoso XL finish wire function
Hello, I don't know if I'm in right section because my issue regarding on level of hierarchy to detect a terminal. From skill procedure I create a rod object (wich is an instance) with fig ==> pin...
View ArticleForum Post: RE: Preventing the config view from defaulting to AMS
That sorted it, thanks Andrew.
View ArticleForum Post: RE: Two Pins on the one wire
This looks pretty useful though I still need other components otherwise calibre will complain that my layout has no schematic components. Looks like I need to use the metal resistors regardless. Thanks...
View ArticleForum Post: Parameterization feature of ADE-XL does not work with Schematic...
Hello, I am using ICADV12.3-64b.500.17 and I am trying to parametrize a design using the variables and parameters window in ADE-XL, and I am facing two different issues I noticed that sweeping some...
View ArticleForum Post: RE: Parameterization feature of ADE-XL does not work with...
Hi Fahmy, This is a known limitation. The issue is that the way we parameterise the design is done in a way to avoid having to re-netlist the design hierarchy, and then it only needs parameter value...
View ArticleForum Post: RE: decrease list of lists by 1 hierarchy list
You can do this (destructively) by doing: A=foreach(mapcan sublist A sublist) You can do it non-destructively (if each sublist only has a single element) by doing: foreach(mapcar sublist A...
View ArticleForum Post: RE: Parameterization feature of ADE-XL does not work with...
Thanks for the prompt reply, will get in touch with customer support Best Regards Fahmy
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