Forum Post: RE: What happened when compile graphic pcell to skill code?
Hi Richard, What you are asking for is not trivial, if I understand the request correctly. If I understand correctly you want some way of capturing user actions in a layout as a sequence of SKILL...
View ArticleForum Post: HighConn and LowConn of input port in IEEE 1801 UPF standard
Hi, While referring to 1801 UPF standard, I came across the below statements in "create_supply_port" command section: a) The LowConn of an input port is a source. b) The HighConn of an input port is a...
View ArticleForum Post: How to enforce schematic rule checker
Is there any way that I can ask the admin to put a piece of skill code in the library to enforce the following schematic rules? 1. Set all Verilog AMS Check rules to error in the Schematic Rules Checks...
View ArticleForum Post: Via-In-Pad DRC Suport
I am new to Cadence - I am trying to use via-in-pad on a design, but I can't figure out how to do so without throwing a ton of DRC errors. How do I set up the constraints to allow placing a via...
View ArticleForum Post: RE: How to enforce schematic rule checker
Some of these things can be partly done via cdsenv variable settings: These can be done with schSetEnv("checkSupportAMS" t) to turn the section on, and then: envSetVal("amsDIrect.vlog"...
View ArticleForum Post: RE: What happened when compile graphic pcell to skill code?
Hi Richard, This does sound as if you're after something like Cadence PCell Designer. I mentioned this in this previous post: You can also see the data sheet for the product . As Lawrence pointed out,...
View ArticleForum Post: RE: PWM-ASK modulated input to Envelop Detector
I don't believe we have anything built-in for the simulator. You either need to generate the signal outside and use a PWL source based on a file of PWM-ASK data. The other alternative would be to write...
View ArticleForum Post: RE: How to change DRD halo shape from rounded corners to rectangle?
I'm not sure this is possible. You probably need to contact customer support as I think this is an enhancement request. Regards, Andrew
View ArticleForum Post: RE: DRD halo shape
Not sure why you asked this twice. I responded in your other post . Andrew.
View ArticleForum Post: RE: Turning enclosed lines into a shape?
That worked great! I just edited a bit to fit our scheme. Thanks so much! procedure( DE_ConvertLineToShape() let((lineDBID, shapeLayer, poly, path) axlSetFindFilter( ?enabled '( "noall" "lines")...
View ArticleForum Post: RE: What happened when compile graphic pcell to skill code?
Hi Lawrence, Thank you for your suggestion. That seems a lot of work to do. To make it clearer, what I need is just to imitate the behavior of graphic PCell in virtuoso, and make it easier to use based...
View ArticleForum Post: RE: What happened when compile graphic pcell to skill code?
Hi Andrew, Thank you for your information. PCell Designer sounds powerful and can do lot of things out of my need. More important, we don't have the license. Actually what I want is just to imitate the...
View ArticleForum Post: RE: Via-In-Pad DRC Suport
Did you go into Constraint Manager? From CM, go into Analyze->Analysis Modes. Then in the form look at "SMD Pin Modes" -- is Via at SMD on or off?
View ArticleForum Post: How to determine electrical equivalence of resolved nets, with...
Hi, I am referring to IEEE 1801-2015 standard's "4.5.5 Supply Equivalence" section. I do not see the standard defining how 2 resolved nets can be called electrically equivalent. Can someone help me out...
View ArticleForum Post: RE: What happened when compile graphic pcell to skill code?
Well, adding a plugin is a matter of using deRegPlugin - however, developing a whole application similar to the (albeit pretty old) Graphical PCell application in Virtuoso is way beyond anything that...
View ArticleForum Post: RE: How to use a custom netlist procedure (and OSSHNL-116 error)
Hello all, sorry for upping this discussion, but I have found a related annoyance. I have a cell A, which instantiate a cell B, which instantiate cell C. I use my netlist procedure only to netlist...
View ArticleForum Post: RE: How to use a custom netlist procedure (and OSSHNL-116 error)
Patrik, This is very hard to answer without seeing the database and your netlist procedure. So I suggest you contact customer support if you can't share it here. Regards, Andrew.
View ArticleForum Post: Forum for Low Power Discussions?
Hi, Is there a techincal user forum, in Cadence or Accellera, that shows / discuss topics on UPF low power standard? Regards Kishore
View ArticleForum Post: RE: How to use a custom netlist procedure (and OSSHNL-116 error)
Hello Andrew, the procedure itself is not secret. I have uploaded it here http://pastebin.com/2qvWEsSp How can I upload the database?
View ArticleForum Post: RE: How to enforce schematic rule checker
Hi, Andrew, Thank you for the naming convention skill code template. I'll see if the skill code can be more effective than the guidelines and rules on a piece of paper that everyone throws away. TJ
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