Dear community, is there a royal-road to implement a look-up-table (LUT) based calibration in maestro assembler? At this moment, I do a pre-cal simulation of a 6-bit-DAC and generate a 4-bit LUT by comparison with desired values. LUT values are used with calcVal in a post-cal simulation. My open issue is that the LUT values are still in 6-bit and not equidistant. I would love to map the LUT values to 4-bit and equidistant. I believe there must be a more easy way of LUT-based calibration. Can you please help me? Soenke
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Forum Post: Using a look-up-table LUT based calibration in maestro assembler
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Forum Post: Netlisting from Capture to PCB Editor Changes Differential Pairs in PCB Editor
My toolset is OrCAD PCB Designer Professional 17.4 S011. I am having an issue where when I import a netlist into PCB Editor from Capture, it changes a few of the differential pairs that I have configured in the Constraint Manager. For some of the differential pairs it renames them, and for others it completely removes the differential pair. Each time I make an adjustment to the schematic then netlist, I have to go back to constraint manager to re-configure these differential pairs. Is there any setting or adjustment that I can make that will not permit the Capture netlist to adjust my differential pairs in PCB Editor after importing the netlist?
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Forum Post: RE: Netlisting from Capture to PCB Editor Changes Differential Pairs in PCB Editor
Note: This is shown in 16.6 not sure if it works this way in later versions: When creating a netlist and I don't want the pcb constraints over written I use the nestlist - Ignore Electrical constraints option.
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Forum Post: RE: Netlisting from Capture to PCB Editor Changes Differential Pairs in PCB Editor
Yes! Thank you. That worked.
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Forum Post: RE: Load .cdsenv.viva on the .cdsinit whitout overwrite default configuration
Hi Andrew, Thanks for your answer With "The interface changes completely", I meant that the font changed and the line width changes to thick. But I was looking for the issue and I saw that I forgot commenting lines on the customize .cdsenv.viva file. Those lines were changing the font and everything else. Now I'm loading with envLoadFile or envLoadVals and works fine. Thank you for your help, Jorge
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Forum Post: RE: Strange transient behavior of an LC-oscillator
Dear Andrew, Thanks for your very fast response. I tried the bbspice interpolation method and the oscillation is now as expected (253GHz, 1.8Vpp). Best, Anh
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Forum Post: How to pass fuse resistance in ADE-L
I have a fuse circuit with an efuse element that has a CDF Parameter called "value of fuse" where you can put the resistance of the efuse. In the past I have had a seperate schematic for blown fuses and un-blown fuses. I set the un-blown fuses to FUSE0 and the blown fuses to FUSE1. Then I instantiate the circuits with the blown fuses where I need them. In ADE-L I set the value of FUSE0 to a low value and FUSE1 to a high value. What I'd really like to do is just have one fuse circuit and pass FUSE0 or FUSE1 into the symbols similar to how I might do a netset. How do I set this up? In the symbol for the efuse I changed the value of the fuse to FUSEVAL, but I haven't found the right place in the fuse circuit symbol to equate FUSEVAL with FUSE0 or FUSE1. Thanks, Chris
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Forum Post: RE: How to pass fuse resistance in ADE-L
Dear chrisindallastx, Is there a reason you could not use a single symbol with its schematic containing a resistor of value "rfuse" and change the value of the design parameter between that of an open fuse and that of a closed fuse? It seems this might be easier from a simulation perspective in Assembler or Explorer. In addition, if the fuse has reactive impedance (i.e., some coupling capacitance for example), you could change its reactive impedance as well as its real impedance. I suppose you could use the variable in to set your nodeset. Just as a check, I assigned a variable as the initial condition for a net, generated a spectre netlist and was able to simulate it. The attached netlist contains the ic statement in line 35. It did initialize the node to the value of the variable I chose. The thought came to mind as I read your problem description...so I wanted to at least ask the question! Sorry if it is not appropriate for your issue! Shawn community.cadence.com/.../netlist_5F00_with_5F00_variable_5F00_for_5F00_ic.scs.txt
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Forum Post: RE: How to pass fuse resistance in ADE-L
Hi Shawn, yes I just need a technique to set the value of each efuse from the symbol instance in the schematic above. That way if there are eight fuses, I can select each and determine whether they are blown or not-blown. You can see in this spectre file that the efuse is a resistor and I have it set value=FUSEVAL, which I can set as a parameter at the top similar to how I did FUSE0, etc., but what I'd like to do when I instantiate each fuse is equate FUSEVAL to either FUSE0 or FUSE1. Chris community.cadence.com/.../0284.test.txt
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Forum Post: RE: ADEXL: automaticaly include extracted view
Dear Shawn, Thanks a lot for your detail reply! Duy-Dong
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Forum Post: RE: ADEXL: automaticaly include extracted view
Dear Duy-Dong, I am just glad it was helpful! Good luck! Shawn
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Forum Post: RE: A pulse modulation triangle current generator in virtuoso
Dar Johnanny Saenz, You are most welcome - but I just hope it was of some help or provided some insight into your problem! Shawn
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Forum Post: Get info from all footprints in library
I would like to write a report that gives 3D mapping info for all footprints in the library. I have written a report that works fine for all footprints on a board, so I should be able to simply swap out the list of footprints on the board with a list of footprints in the library. But I'm not sure how to do that. getDirFiles(axlOSSlash(strcat(axlGetVariable("CDS_SITE") "//footprints"))) gives me a list of all footprints in the library, but I don't know how to access the footprint properties. The board report is as simple as symdef->prop->PKGDEF_STEP_FILE (and the other 3D model properties) for each footprint on the board, but that doesn't work with a pile of PSM files sitting out on a network folder. Does anyone know how I can access the properties of a footprint on the network? I searched the forum and didn't find anything but I may have just not used the proper search terms. Thanks in advance for any help!
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Forum Post: RE: Differences between APD & CDNSIP
Hi All, request for some feedback on this please. thanks
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Forum Post: RE: Orcad Capture 17.2 Footprint Viewer not working
Hi Velocity I have the same issue. Did you solve ? where can I found the session log file ? Tks Franco
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Forum Post: Layout SKILL - ungroup
Hi everyone, Do you know if there is a way to ungroup a FigGroup in layout in SKILL? I could not find it so far. Thanks in advance, Rodrigo
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Forum Post: PCB Stackup in IPC-2581 format
Are there any designers who's pcb board house utilizes IPC-2581 for their stackup. I use Allegro PCB Editor for our pcb designs and this editor has the ability to import and export IPC-2581 pcb stackups. Our board house does not have that capability or they are not willing to use it. What I have found is that Allegro pcb editor has many formats which can be utilized to import or export files to a board house but if the board house does not use them, what good are they. Our board house still uses gerbers. I usually send our pcba supplier, gerbers, ODB++ and IPC-2581. In reality I should only have to export an IPC-2581 file and be done but it seems the board houses are still using formats from years ago. Anyway, if someone knows a board house, either domestic or off-shore, which uses IPC-2581 I would appreciate knowing that company. Thanks, HS
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Forum Post: RE: PCB Stackup in IPC-2581 format
I was under the impression that Polar Instruments which most fab houses use does export the IPC2581 cross section so they may well have this tool which they use to calculate impedance. The latest version of Polar should have this capability. It may also be worth looking at this, there is a DFM Partner program integrated with Allegro that may also help you. Cadence PCB Design True DFM Wizard - YouTube
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Forum Post: To be able to print the "region" DC operating parameter of all the transistors in the design
Hi All, wish to request guidance on how to use AD-EXL expressions to be able to print the "region" DC operating parameter of all the transistors in the design in the output after DC simulation. If there is any other method for this then I can try that as well. I am using IC6.1.8 Any suggestions will be great help ! REGARDS
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Forum Post: RE: PCB Stackup in IPC-2581 format
I had tried the DFM Partner program two years ago. One company looked promising but after using them twice for designs we did not see the value of using them again. I will look for others, possibly newer partners within that group and reach out to them. Thanks for your information.
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