Francesco, It's more a case of being able to debug a problem without a blindfold on, which is easier to do via the normal support channels. There's typically quite a lot I can do in the forums, but it does often involve a fair degree of guesswork as to what the real problem might be, when you're in a darkened room, at night, with a blindfold on! Regards, Andrew.
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Forum Post: RE: Extracted simulation not working properly - netlist problem...?
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Forum Post: RE: custom VCCS
I tried writing V(x,y) but when I change the output resistor , it does not affect the output current which is does not happen in the real situation. Any other suggestion will be appreciated.
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Forum Post: RE: custom VCCS
Given that in VerilogA it's quite straightforward to write equations for a conservative system, it must just be that you've not captured the equation correctly. You can write an equation that relates the current through a branch to the voltage across it or vice versa - so it's easy to describe a capacitor, an inductor, or a resistor or some complex relationship which has elements of all of them in some non-linear way. Unless we are able to know how the actual measured data was made, and how it behaves, I doubt anyone can give you a suggestion as to what you should be doing - we're in the dark here! Regards, Andrew.
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Forum Post: Changing footprint text size in entire library
We've been looking into our silkscreen text sizes and found we can shrink them a bit. So we'd like to do this for every component in our library. Is there a way to automate this? We'd want to change only the ref des text on the silkscreen layer, not text on other layers. DRA files are binary so I can't use a script. I could do it in SKILL but how to rip through the library folder, open each footprint, run the SKILL script, save the footprint, and move on to the next footprint? There's probably an easy way that I didn't think about or of which I'm not aware. Any help would be appreciated!
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Forum Post: DEFT
I want to use the DEFT feature in Cadence. I went to tool>technology file manager> and then this little form showed up that has things like dump....etc. There should be DEFT under the edit option. I cannot find it, however. I checked the software package I have and DEFT seems to be installed. Any idea how I can handle this? I want to DEFT tool to show up in that form or in general I want to be able to use it. Thanks SHerif
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Forum Post: RE: Changing footprint text size in entire library
I've created and used this piece of code to go through several DRA files. You need to change the correct directory, add the text change function and a save+compile symbol. l_dir = '("C:/TEMP/DAWRINGS") pcre = pcreCompile(".DRA" 1) noconfirmStatus = axlGetVariable("NOCONFIRM") axlSetVariable("NOCONFIRM", t) foreach(dir l_dir l_files = pcreMatchList(pcre getDirFiles(dir)) tot = length(l_files) foreach(file l_files axlMsgPut("%d: %d - %s" tot done++ file) if(draName = axlOpenDesignForBatch(strcat( dir "/" file) "wf") then t ;do change here ;save and compile symbol else axlUIConfirm(sprintf(nil "Could not open %s!" file) 'error) ) ) ) axlSetVariable("NOCONFIRM", noconfirmStatus)
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Forum Post: RE: Silk Rotate skill file
See attached. Hope this helps. (Please visit the site to view this file)
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Forum Post: RE: Changing net on vias
Thanks for the feedback. F6 works for me on 16.6 s085
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Forum Post: RE: A few questions regarding using PSS for rectifier design
Thank you very much for your reply, Andrew. How to set reltol through the GUI (ADE)? For the accuracy parameters, I only see, iteratio, steadyratio, itres and I don't see reltol anywhere (in the simulation option forum). From reading spectre.out, it seems that reltol has been set to 1e-4 by default, errpreset = conservative. Is that a reasonable value? With this setting, I still observe about 1~2% (sometimes 3) discrepancy for results (e.g. rectifier's output DC). Does this sound reasonable to you? Many thanks, Regards, Menghan
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Forum Post: Performing Parasitic Extraction on a Layout which Contains an ADS Momentum Cell
Hello, Firstly, I use the following versions of the tools: IC6.1.6-64b.500.11 Calibre nmLVS 2016.2_39.29 Calibre Quantus QRC ADS 2012.08 My goal is to perform RC extraction on a layout (let’s say myLayout) that contains an inductor cell which is characterised with Momentum simulations. myLayout contains also other components like MOSFETS, resistors etc. I simulate the integrated inductor with ADS Momentum and create the simulator cell views. Then I perform LVS on myLayout by providing a BOX rule file. Like that, the inductor is seen as a box. The LVS works without any problem on myLayout. However, I am not sure about the parasitic extraction with Calibre - Quantus QRC. In my opinion, the inductor cell should be blocked during the parasitic extraction since it is already extracted by ADS simulation. Then the model provided by ADS should be included in the extracted view created by Calibre QRC extraction. However, I am not sure how to perform this. I am not even sure if what I have in my mind is the best and known flow for the case I am having. Could you please help me and provide the correct flow of this problem? Thank you very much in advance. Best regards, Can
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Forum Post: RE: Performing Parasitic Extraction on a Layout which Contains an ADS Momentum Cell
Can, This multi-vendor flow is probably best handled by contacting customer support . You have Mentor (for Calibre), Cadence (for Quantus) and Keysight (for Momentum) to consider here, as well as ensuring that the resulting extracted view netlists correctly. Regards, Andrew.
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Forum Post: Setting up a jitter simulation
Hi, I do not quite understand how the pss/pnoise jitter simulation works and if it is the right tool in the first place. I generate a clock with a bunch of logic gates and flip flops and would like to assess what kind of jitter (in ps rms) I can expect at the output. For a first testbench I use a simple vpulse creating a rectangular 100 MHz clock and a simple CMOS inverter. I set up a pss simulation with: harmonic balance Beat Frequency 100M number of harmonics: 21 followed by pnose with: Absolute sweep From 1k to 10G Default sidebands Noise type: jitter Threshold value: 0 Crossing direction: all Is this the correct setup? When I start this sim I sometimes get "No zerocrossing found". If it works, I can plot "Threshold Xing" for different "Event Time". What it this for? Then I can plot Jee, Jc and Jcc, giving me all different results and I do not understand why I need to select the Event time or number of cycles. For example, for the listed event times (look like random numbers to me), the total integrated jitter is 77ps, 191ps, 233fs, 228fs. Why is there such a huge spread and which number is expected to be the "correct" one? Based on a quick back-on-the envelope calculation jitter should be around 150fs rms: I use 20ps rise and fall time and the total integrated noise of this inverter is around 7mVrms: 7mV/(1V/20ps) = 140fs. So even if I get this right I wonder how I could simulate a clock generation circuit using a ring counter: Say, I use a 100 MHz clock, put it into 10 flip flops in feedback to get 10 MHz clock. Is this possible at all? Thanks!
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Forum Post: RE: Tcl script, for library manipulation
How can i give a property name with space( for eg: "manufacturer partnumber") in this CapLibPropUtil.tcl script as a parameter...? since space consider it as next parameter..
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Forum Post: RE: DEFT
Sherif, You didn't mention which IC version you're using, but my guess is that it's IC617. DEFT has been removed from the form in IC617 as the first step along the way to it being removed altogether. You can either contact customer support to find out how to access it in IC617, or use IC616 in the meantime. There is a plan for a new tool to replace it, but it's not been released yet. Regards, Andrew.
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Forum Post: RE: Tcl script, for library manipulation
Sorry, the problem is solved by just putting curly braces. As your advice i read the tcl/tk extension pdf, on page no. 148 START class DboValue GetString(Value) : returns DboState Class : DboValue Parameters: Value: CString & here the value returned is DboState. from my understanding Dbostate is a class. so this means returning a class!!. i didnt understand the logic.... thanks in advance oldmouldy :)
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Forum Post: RE: Setting up a jitter simulation
This is probably best dealt with via customer support (or even training) because there's a lot here (and I can only give a very quick answer) - but here's a few points: Jitter mode (at least the "pmjitter" mode) uses the "time domain" noise feature of pnoise analysis. This works by adding an ideal sampler at the output of the circuit, and then observing the noise at that instant in time. The noise is still the time-averaged noise over the period as it appears at the output of the sampler. That's different from just measuring the small-signal noise at the operating point at that instant; it means that noise generated earlier in the cycle can still end up making it through to the output at the instant you sample at. The time at which the sampler fires is controlled by a threshold crossing. What this means is that when the PSS solution for the signal you're observing crosses the threshold, it samples. You get a separate result for each crossing point (each "event time") - particularly you could get different results at rising and falling edges, or if there's more than one cycle in a complex circuit. In addition to measuring the noise at each of these event times, it also captures the slew rate of the large signal at the threshold crossings too. The slew rate together with the noise allows it to translate the noise into a time-metric; you have the PM portion of the noise captured at these threshold crossings (you're ignoring the noise in the flat bits of the signal at the output). You are sweeping far too wide a frequency range in your pnoise analysis. Because of the ideal sampler which is sampling at the PSS fundamental rate, you should not sweep beyond the Nyquist frequency (i.e. half the PSS fundamental). If you step beyond this, it will include the noise multiple times because there is a lot of noise folding caused by that ideal sampler (so actually you don't need to sweep beyond 50MHz). Whether you choose rising or falling or all for the crossing direction depends on the importance of jitter on the signal coming out of this block - i.e. is the subsequent system only dependent upon the rising, falling or both edges? As far as number of sidebands are concerned, you generally should pick the "full spectrum" option - this will be more accurate (at least it will be more performant that specifying huge numbers of sidebands - the "default" is probably too low if you only did that). I don't really know why the results vary so much but then again I can't see all of your setup (and there are already several things wrong). If you're not getting any threshold crossings, you should look at the PSS time domain waveforms to see what's going on. The number of cycles in some of the measurements is for if you're measuring K-cycle jitter, in the situation where the jitter accumulates. That depends on the type of circuit and the spec you're trying to achieve. There is an old app note that could be useful in the MMSIM/SPECTRE installation, at tools/spectre/examples/SpectreRF_workshop/JitterAN.pdf Regards, Andrew.
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Forum Post: RE: A few questions regarding using PSS for rectifier design
Hi Menghan, I'm not sure what this "discrepancy" is relative to; I would expect results to be more accurate with conservative and a relative tolerance of 1e-4, but I don't know what you're measuring or what you're comparing it with. So I can't comment if it's reasonable or not! That's why I suggested you contact customer support... The reltol is set on the Simulation->Options->Analog form, although I wouldn't advise wholesale setting of this parameter without knowing what you're doing. Maybe you can try setting it to 1e-5, but I have no idea what you're actually trying to do here. So I would strongly recommend contacting customer support. Andrew.
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Forum Post: Sweeping 2 variables (at a time) in Parametric analysis
hi I have a question regarding parametric analysis. I want to sweep two variables (in parallel) to find some optimum value. but i am facing the problem that it sweeps one variable while fixing the other; and after completing the 1st variable sweep; it takes next value of variable 2 and sweeps variable 1 again for complete range. so how can i made modifications in parametric analysis to sweep both variables in parallel. Many Thanks
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Forum Post: RE: Sweeping 2 variables (at a time) in Parametric analysis
i got it in parametric set but it is hectic if range is large with small intervals. how can it be made in linear steps by defining only initial, final values and step size. Thanks
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Forum Post: SKILL for Substrate Integrated Waveguide layout
Folks, I've been looking for some generic custom SKILL (using virtuoso, IC6.1.7) to generate arrays of vias based on PDK-defiend minimum via spacing in a variety of different areas (polygons) between arbitrary metal layers, to include metal slotting for large connected areas. I'm building a number of 3D structures, include SIWs, in the BEOL and hand-generating these arrays for each structure is quite time consuming. Any pointers on where I should be looking? Regards, Jack
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