Andrew, great, appreciated, thanks, Brian.
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Forum Post: RE: Creat blockage from polygon?
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Forum Post: RE: How to reduce time needed before transient simulation to be started in case of large circuit
Hi Andrew, Here i see that i am using following simulator: Cadence (R) Virtuoso (R) Spectre (R) Circuit Simulator Version 12.1.1.048 64bit (found from input.log file) Now i have several questions: 1. you said that for transient simulation i need to set up readns="spectre.ic"(leave skipdc=no, readic blank), but at that time, i also need spectre.dc file. I don't know why this spectre.dc file is needed and how? because in transient simulation options, i don't see any field like readns, readic where i would use spectre.dc file. 2.If i assume that spectre.dc file is needed for rapid DC convergence during transient simulation, at that time, do i have to run dc simulation before transient simulation? because i see, there is a field" write" in option of dc simulation which would produce spectre.dc file. And what's the difference between spectre.dc and spectre.ic files? Do they contain same information? 3.Actually, i have to simulate large image read circuit of different columns. Every column contains same circuit diagram and same number of transistors. So circuit containing 256 columns is just bigger than circuit containing 64 columns, but every column includes same circuit diagram. So at that time, if i use spectre.ic (found from circuit containing 64 columns) in readns of bigger circuit (circuit containing 256 columns) during transient simulation, will this trick help to reduce DC convergence time, (although some extra nodes will be added to the second bigger circuit)? 4. Can you please explain (your last point) in more details about how to find out the reasons of taking too much time for DC convergence? sorry, i couldn't get it.
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Forum Post: RE: Creat blockage from polygon?
Hi Andrew, Why did you group the two lines inside prog? -Ramakrishnan
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Forum Post: RE: .cdsplotinit and trying to print schematics on 11x17 paper
Hi Quek, for some reason, I can log in here just fine but when I click on the link, it asks me to log in again and tells me that my account is expired.
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Forum Post: RE: STEP Export not working
I chatted with author of the STEP files and he found a solution. I'm attaching our conversation about this issue.(Please visit the site to view this file)
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Forum Post: RE: Creat blockage from polygon?
Ramakrishnan, I'm using prog1 (not prog) because I want the return value of each branch in the case function to be the list of points (you'll see the return value is stored in the variable points ). Because I need to retrieve the list of points from the temporary object and then delete it, I use prog1 - prog1 executes all the statements in order but the return value is the first statement executed (as opposed to the usual convention of the last thing executed). So here the prog1 returns the list of points and then deletes the object from which it had retrieved the list of points. It avoids needing to use another variable - of course, I could have moved all the points= assignments inside the case statement but I'd already written the part which handled rect and polygon and then thought I probably should add path and pathSeg for completeness. Regards, Andrew.
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Forum Post: RE: .cdsplotinit and trying to print schematics on 11x17 paper
The logins are linked but there are more restrictions on the support.cadence.com account. I suggest you send an email to support@cadence.com and ask them to reset your online support login (explain that it's expired and what is happening). Regards, Andrew.
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Forum Post: RE: Creat blockage from polygon?
Thanks Andrew. I learnt something here today. -Ramakrishnan
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Forum Post: Limitation of evalstring and ML text field
Hi, I have written a GUI where I let the users to write/paste skill script in a ML text field. I see people pasting very large text files inside the field. This concerns me. I want to know when does this method break? Which one overflows first? The ML field or evalstring/errset? -Ramakrishnan
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Forum Post: RE: Limitation of evalstring and ML text field
Ramakrishnan, I just created (using SKILL) some code which was 5Mbytes long and both the ML text field and evalstring had no problem with this. So in practice I doubt you'll hit any limitations... the only limitation you'd likely to hit is if you end up with exceeding the maximum function size (hard to describe because it depends on many things) or the value stack overflowing. This would only happen with extremely large SKILL function definitions - and only ever tend to be reached in machine-generated code. Regards, Andrew.
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Forum Post: parallel routing setting in constraints manager.
I have 2 signals that I need to route with the same length of trace from end to end. Which is the best settings in CM to ensure the switching is performed at the same time (ie the same length of trace). I am not after any impedance matching, just a simple timing arrival similarity (length of trace).
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Forum Post: RE: Limitation of evalstring and ML text field
Thanks for the testcase Andrew. I was lazy to do one. I'm wondering what isyour 5MB text code? Is it a print statement with a counter?
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Forum Post: select multiple physical symbols in PCB editor by cross probing a section in sch in concept HDL
Hello, I am doing a project in concept HDL. I am able to select or move a single physical symbol in layout by cross probing in Concept HDL Sch. But if i want to select or move multiple physical symbol in layout by cross probing a particular section in Sch, it is not happening. Is there any solution for this. This problem was not there in orcad capture. Thanks, Murali.B
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Forum Post: RE: Using toplevel('ils) in an ocean script causes undefined variable errors
Ah, that's pretty interesting. I'll isolate all my SKILL++ code in .ils files then, thanks again.
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Forum Post: RE: Limitation of evalstring and ML text field
Here's what I threw together (I wrote it in C syntax rather than my preferred Lisp syntax just in case I had to share it!) strs=nil for(j 1 100 nums=nil for(i 1 10000 nums=cons(sprintf(nil "%d" i+1000) nums) ) str=strcat("println(" buildString(nums "+") ")") strs=cons(str strs) ) bigStr=buildString(strs "\n") procedure(myEvaluateIt(form) let((pat) pat=pcreCompile("\n") ; this replaces all the carriage returns with space so that ; it gets slurped in one go evalstring(pcreReplace(pat form->big->value " " 0)) ; alternatively could use loadstring. ;loadstring(form->big->value) ) ) big=hiCreateMLTextField(?name 'big ?prompt "Big" ?value bigStr) hiCreateAppForm(?name 'myForm ?fields list(big) ?callback 'myEvaluateIt) hiDisplayForm(myForm)
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Forum Post: Problem of RC Extraction with GPDK45nm(gpdk045_V_3_5)
Hi When I was running RCX extraction using ASSURA with gpdk045 model. Always I'm getting warnings and then failed to extract layout. From the log file, some libraries models are missing in gpdk45. Please see below log file. Thank you Assura (R) Physical Verification Version av4.1 Copyright (c) Cadence Design Systems. All rights reserved. assura version av4.1 Loading tech rule set file : /root/gpdk045_v_3_5/assura/techRuleSets Checking out 1 license for Assura_RCX Starting /mnt/cadence/ASSURA41_USR3_HF1_615_lnx86/tools/assura/bin/rcxToDfII /root/gpdk045_v_3_5/rcx.SRAM_cell_layout.rsf -t -cdslib /root/gpdk045_v_3_5/cds.lib -libdefs /root/gpdk045_v_3_5/lib.defs Virtuoso Framework License (111) was checked out successfully. Total checkout time was 0.06s. *WARNING* lib.defs files and the -libdefs option are no longer supported. The file '/root/gpdk045_v_3_5/lib.defs' will be ignored. The cds.lib file '/root/gpdk045_v_3_5/cds.lib' takes precedence. @(#)$CDS: rcxToDfII version av4.1:Production:dfII6.1.5:IC6.1.5.500.15 02/20/2013 00:18 (sfrh54) $ sub-version 4.1_USR3_HF1, integ signature 2013-02-19-2240 run on localhost.localdomain from /mnt/cadence/ASSURA41_USR3_HF1_615_lnx86/tools.lnx86/assura/bin/32bit/rcxToDfII on Tue Jul 25 21:48:38 2017 Loading tech rule set file : /root/gpdk045_v_3_5/assura/techRuleSets Loading gpdk045/libInit.il ... Loading gpdk045/loadCxt.ile ... done! Loading context 'gpdk045' from library 'gpdk045' ... done! Loading context 'pdkUtils' from library 'gpdk045' ... done! Loading gpdk045/gpdk045_customFilter.il ... done! Loading gpdk045/libInitCustomExit.il ... Loading Environment Settings ... Loading gpdk045/gpdk045_PDKRegistrations.il ... done! ************************************************************* * Cadence Design Systems, Inc. * * * * Generic 45nm PDK * * (gpdk045) * * * ************************************************************* VERSION: 3.5 done! Loaded gpdk045/libInit.il successfully! *WARNING* No library model for device "g45inda". *WARNING* (DB-270211): dbOpenCellViewByType: Failed to open cellview (g45cmim ivpcell) from lib (gpdk045) in 'r' mode because cellview does not exist, or cellview type is not recognized by dbOpenCellViewByType. *WARNING* No library model for device "g45cmim ivpcell gpdk045 ". *WARNING* No library model for device "g45inds". Finished /mnt/cadence/ASSURA41_USR3_HF1_615_lnx86/tools/assura/bin/rcxToDfII Starting /mnt/cadence/ASSURA41_USR3_HF1_615_lnx86/tools/assura/bin/avRCXxref /root/gpdk045_v_3_5/rcx.SRAM_cell_layout.rsf @(#)$CDS: avRCXxref version av4.1:Production:dfII6.1.5:IC6.1.5.500.15 02/20/2013 00:13 (sfrh54) $ sub-version 4.1_USR3_HF1, integ signature 2013-02-19-2240 run on localhost.localdomain at Tue Jul 25 21:48:39 2017 Reading rsf Finished /mnt/cadence/ASSURA41_USR3_HF1_615_lnx86/tools/assura/bin/avRCXxref Constructing the RCX run script *WARNING* at "RCXspice": ?extractMosDiffusionAP option will be retired in the next release. Could not open file /root/gpdk045_v_3_5/assura/../qrc/RCXspiceINIT for reading *WARNING* Bad return status from RCX script generator. 0x100
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Forum Post: APS simulation: When a DC supply isn't DC
I'm getting strange behavior from an APS run and I'm hoping I can get some suggestions to debug/resolve the issue. Basically, my waveforms are skipping around. The problems started when I added a full extractions of one of the child blocks (other blocks were already post-layout). The most egregious failure I've seen is the VDD supply. For a single time step around 50ps into the simulation it drops down to 0 and then bounces right back. This is a DC supply. I'm seeing similar behavior on other pulse supplies where the voltage isn't following a straight line from start to finish. I would suspect there was some convergence issue but the log file doesn't have any errors/warning during the run. I've tried adding source resistance to the supplies which in the past has helped with convergence but it made no difference. Any thoughts on how to debug this? Options to try? Ideas why a DC supply isn't DC? Thanks in advance....
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Forum Post: scs file calls a verilogA
Hello, I have a ".scs" file that calls a verilogA model. the line in the .scs file that does this reads the following: memr_TMO_test p n memr_TMO_test HRS=HRS1 LRS=LRS1 Vtp=VtP Vtn=VtN the verilogA model is called: memr_TMO_test.va when I run the simulation in ADE, I get the following error: /research/seneca/freepdk/memr_TMO_test.scs" 16: Instance `memr_TMO_test' in subckt `memr_TMO_test' recursively calls subckt `memr_TMO_test'. `memr_TMO_test' should be updated to remove the call to `memr_TMO_test'. can someone help with that thanks
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Forum Post: RE: APS simulation: When a DC supply isn't DC
Assuming by "DC supply" you mean it's directly connected to a voltage source, then the only reason I can see this happening is if you've not got something connected - typically things like not connecting the grounds properly can cause this because some part of the circuit is floating. This is probably something best dealt with by customer support because it would be much easier to see it. I doubt very much whether it is a simulator convergence issue - more likely to be a connectivity problem. Andrew.
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Forum Post: RE: Problem of RC Extraction with GPDK45nm(gpdk045_V_3_5)
Two things: You should use Quantus QRC not Assura RCX (QRC is in the EXT stream). Assura RCX is very old and no longer maintained The missing ivpcell for g45cmim was fixed in gpdk045 version 4.0 (you're using 3.5). You should be able to workaround this by unchecking the "Enable cellview check" checkbox on the QRC form (or Assura RCX form) - this will not then complain if any of the devices seem to be missing. Andrew.
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