Hi Glen, Actually, you can have a 3 edge overlap if it ends up being a narrow region of one end of the ellipse box (I tried this). For example - the white box is the ellipse box, the yellow is the arc box: There are a few other failure modes that can result in the error message (for example, a zero-area rectangle for the arc box), but the main one appears to be due to the angle constraint. Regards, Andrew
↧
Forum Post: RE: Pcell symbol with curved shapes using dbCreateArc failing
↧
Forum Post: RE: 3DXcanva does not suppress the unused pad on via
Hello gvellet , I will contact you through another channel and share the process. Also, I will update here once the CCR is fixed and the fix is available to download.
↧
↧
Forum Post: RE: Allegro Design 17.4 After revising pad stack, what is preventing me from updating the pad stack in the design?
You can try using batch commands, This can be done with the command refresh_padstack that can be run on the OS command line. for %f IN (*.dra) DO refresh_padstack -d %f
↧
Forum Post: Spice sub-circuit in the schematic editor
I need to use a spice sub-circuit from LTspice in the Virtuoso schematic editor. I copied and pasted the .subckt attached to a Spice text editor file. However, it gives me the following errors: Error: Instance `B1': Unexpected value `uplim' - this element does not accept any positional parameters. Error: Instance `B1': Unexpected value `v(1)' - this element does not accept any positional parameters. Error: Instance `B1': Unexpected value `v(3)' - this element does not accept any positional parameters. Error: Instance `B1': Unexpected value `0.2' - this element does not accept any positional parameters. Error: Instance `B1': Unexpected value `0.1' - this element does not accept any positional parameters. Error: Instance `B1': Unexpected value `v(4)' - this element does not accept any positional parameters. Error: Instance `B1': Unexpected value `-0.2' - this element does not accept any positional parameters. Error: Instance `B1': Unexpected value `0.1' - this element does not accept any positional parameters. Error: Instance `B1': Unexpected value `+1n*V' - this element does not accept any positional parameters. Error: Instance `B1': Unexpected value `1' - this element does not accept any positional parameters. Error: Instance `B1': Unexpected value `-1.4705e-10' - this element does not accept any positional parameters. Error: Instance `B2': Unexpected value `uplim' - this element does not accept any positional parameters. Error: Instance `B2': Unexpected value `v(2)' - this element does not accept any positional parameters. Error: Instance `B2': Unexpected value `v(3)' - this element does not accept any positional parameters. Error: Instance `B2': Unexpected value `0.21' - this element does not accept any positional parameters. Error: Instance `B2': Unexpected value `0.1' - this element does not accept any positional parameters. Error: Instance `B2': Unexpected value `v(4)' - this element does not accept any positional parameters. Error: Instance `B2': Unexpected value `-0.21' - this element does not accept any positional parameters. Error: Instance `B2': Unexpected value `0.1' - this element does not accept any positional parameters. Error: Instance `B2': Unexpected value `+1n*V' - this element does not accept any positional parameters. Error: Instance `B2': Unexpected value `2' - this element does not accept any positional parameters. simulator lang=spice .subckt LTC6082 1 2 3 4 5 X1 2 1 0 0 0 0 0 0 OTA g=0 in=.5f B1 0 N004 I=10u*dnlim(uplim(V(1),V(3)+.2,.1), V(4)-.2, .1)+1n*V(1)-147.05p B2 N004 0 I=10u*dnlim(uplim(V(2),V(3)+.21,.1), V(4)-.21, .1)+1n*V(2) C10 N004 0 50f Rpar=100K noiseless M1 5 N011 4 4 NI temp=27 C2 3 5 1p Rpar=100Meg noiseless D5 N011 4 DLIMN M2 5 N007 3 3 PI temp=27 D8 3 N007 DLIMP C3 3 N007 10f Rser=1.5Meg noiseless X3 N008 N009 4 4 4 4 N007 4 OTA g=200n ref=-37m linear vlow=-1e308 vhigh=1e308 C11 5 4 1p Rpar=100Meg noiseless C12 N011 4 10f Rser=1Meg noiseless X4 0 N004 0 0 0 0 N005 0 OTA g=1u linear en=12.6n enk=55.4 Vhigh=1e308 Vlow=-1e308 C16 N009 5 790f X5 N006 0 N008 N008 N008 N008 N009 N008 OTA g=18u iout=1.4u Vhigh=1e308 Vlow=-1e308 G1 4 N011 N009 N008 200n D9 N009 N008 DLIM C7 3 1 3.5p Rser=10 Rpar=5T noiseless C13 3 4 1000p C1 N005 0 105f Rpar=1Meg noiseless G2 0 N008 4 0 .5m G4 0 N008 3 0 .5m C18 N008 0 200p Rpar=1K noiseless D1 2 1 DIN G3 0 N006 N005 0 1m L1 N006 0 170µ Cpar=177f Rser=1.07k Rpar=15.28k noiseless C9 N007 5 50f Rser=1.5Meg noiseless C8 5 N011 50f Rser=1.5Meg noiseless C4 3 2 3.5p Rser=10 Rpar=5T noiseless C5 1 4 3.5p Rser=10 Rpar=5T noiseless C6 2 4 3.5p Rser=10 Rpar=5T noiseless D3 3 2 DBIAS D4 3 1 DBIAS D6 2 3 DESD D7 4 2 DESD D10 1 3 DESD D11 4 1 DESD D2 3 4 DPOW .model DIN D(Ron=1k Roff=10T Vfwd=1.5 epsilon=.1 Vrev=1.5 revepsilon=.1 noiseless) .model DBIAS D(Ron=1g Roff=1T epsilon=.3 ilimit=.2p noiseless) .model DPOW D(Ron=1k Roff=1G Vfwd=.1 epsilon=50m ilimit=252.8u noiseless) .model NI VDMOS(Vto=300m kp=30m lambda=.01) .model PI VDMOS(Vto=-300m Kp=30m lambda=.01 pchan) .model DLIM D(Ron=100k Roff=70Meg Vfwd=200m Vrev=200m epsilon=10m revepsilon=10m noiseless) .model DESD D(Ron=10 Roff=10T Vfwd=.7 epsilon=.1 noiseless) .model DLIMN D(Ron=100k Roff=100Meg Vfwd=1.65 Vrev=-300m epsilon=.1 noiseless) .model DLIMP D(Ron=100k Roff=100Meg Vfwd=1.55 Vrev=-300m epsilon=10m revepsilon=10m noiseless) .ends LTC6082 *
↧
Forum Post: RE: Pcell symbol with curved shapes using dbCreateArc failing
Andrew, Interesting. I re-entered my original command, which failed. I then reduced the x(UR) of the arc bbox until it worked. Original: dbCreateArc(cv lineLayer list(0.08125:0.1375 0.13125:0.1875) list(0.08125:0.1375 0.1125 :0.1875)) Worked: dbCreateArc(cv lineLayer list(0.08125:0.1375 0.13125:0.1875) list(0.08125:0.1375 0.1093 :0.1875)) It seems the 0.1125 is just over half of the x of the ellipse bbox. Half would be ( 0.08125:0 + 0.13125) / 2 = 0.10625, within the working range of the arc bbox. Thanks for the insight. Regards, Glen
↧
↧
Forum Post: Where is the documentation for the Core Skill function "makeArray()" ?
I am having trouble finding the documentation for makeArray using the Cadence SKILL API finder or user manual. I know it exists because the interpreter in the CIW recognizes it and it appears to declare multidimensional arrays. Ultimately, I would like to make a 2D array of booleans, and this function seems like a clean way to do it.
↧
Forum Post: RE: Where is the documentation for the Core Skill function "makeArray()" ?
It's a private function (very old, and before we were strict about the naming of private versus public functions), and hence not documented. You should not use it. Here's an example implementation of a function to create a multidimensional array easily though: /* abMultiDimArray.il Author A.D.Beckett Group Custom IC (UK), Cadence Design Systems Ltd. Language SKILL Date Nov 23, 2009 Modified By Function for creating a multi-dimensional array. Usage: data=abMultiDimArray(6 8) Creates a 6 by 8 array (starting index is from 0). Then you can use: data[4][5]=23 data[0][7]=123 You can specify more dimensions by passing more arguments to abMultiDimArray. *************************************************** SCCS Info: @(#) abMultiDimArray.il 11/23/09.16:24:27 1.1 */ procedure (abMultiDimArray(@rest dimensions) let ((arr) if (integerp( car (dimensions)) && plusp ( car (dimensions)) then arr=makeVector( car (dimensions)) when ( cdr (dimensions) for (ind 0 sub1 ( car (dimensions)) arr[ind]= apply ('abMultiDimArray cdr (dimensions)) ) ) ; when arr else error ( "Dimension %L must be a positive integer\n" car (dimensions)) ) ; if ) ; let ) ; procedure
↧
Forum Post: RE: Spice sub-circuit in the schematic editor
Spectre does not support LTSPICE models. The closest is probably PSPICE models, but putting the subckt above in a pspice view generates a bunch of errors because it's not pspice syntax. (Spectre does support Pspice models, but you should use the Pspice view type for this). Andrew
↧
Forum Post: RE: Error loading OCEAN scripts in nograph mode - strcat: argument #1 should be either a string or a symbol (type template = "S") - nil
Andrew, Thank you, I've found the source of error. There is an error further up in the log file \o Error found by spectre during circuit read-in. \o ERROR (SFE-23): "input.scs" 13: The instance `MN0' is referencing an \o undefined model or subcircuit, `dgnfet'. Either include the file \o containing the definition of `dgnfet', or define `dgnfet' before \o running the simulation. I found something interesting, which is that if I close Virtuoso, open it in the GUI, and run the simple simulation script, it also fails with the same error. However, if I open the cell and run the sim in ADE, the script now works. The source of error may be in how it loads the libraries, particularly the path to them. This is how the script does it: modelFile( '("$SPECTRE_MODEL_PATH/design_wrapper.lib.scs" "mainlib") '("$SPECTRE_MODEL_PATH/design_wrapper.lib.scs" "FET_tt_pre") '("$SPECTRE_MODEL_PATH/design_wrapper.lib.scs" "Res_nom") '("$SPECTRE_MODEL_PATH/design_wrapper.lib.scs" "MOSCap_nom") '("$SPECTRE_MODEL_PATH/design_wrapper.lib.scs" "APMOMCap_nom") '("$SPECTRE_MODEL_PATH/design_wrapper.lib.scs" "MIMCap_nom") '("$SPECTRE_MODEL_PATH/design_wrapper.lib.scs" "Ind_nom") '("$SPECTRE_MODEL_PATH/design_wrapper.lib.scs" "DioCap_nom") ) I have access to a school server, completely separate from this one, and the virtuoso -nograph works fine, and I looked and indeed the modelfile path is entirely written out. On my work setup, "SPECTRE_MODEL_PATH" is only created when opening the schematic, confirmed in the log. So I replaced that string with the actual full path and it works!
↧
↧
Forum Post: RE: Where is the documentation for the Core Skill function "makeArray()" ?
Thank you for the response and code!
↧
Forum Post: RE: Error loading OCEAN scripts in nograph mode - strcat: argument #1 should be either a string or a symbol (type template = "S") - nil
My guess is that something in the PDK (maybe in the libInit.il of the technology library) is doing a setShellEnvVar("SPECTRE_MODEL_PATH" "/some/directory"). That wouldn't be triggered if your OCEAN script is using design("/path/to/netlist"). If instead it used design("lib" "cell" "view") then it probably would get triggered (that would trigger the netlisting to be done as well). Alternatively, you could explicitly call setShellEnvVar() at the beginning of your OCEAN script to set the path appropriately? Andrew
↧
Forum Post: RE: skill to via align and set the sapce or dist between vias in allegro
You might want to look at the posting https://community.cadence.com/cadence_technology_forums/pcb-design/f/pcb-design/19920/align-tool
↧
Forum Post: RE: how to export clock crossing to file
I'd be surprised that saving a single signal would really be significantly better than writing out an ASCII file with just the time info of the crossing, but you could use the freq_meter component from ahdlLib for this. Add: DEFINE ahdlLib $(inst_root_with:tools/dfII/bin/virtuoso)/tools/dfII/samples/artist/ahdlLib to your cds.lib to access this library. Andrew
↧
↧
Forum Post: RE: skill to via align and set the sapce or dist between vias in allegro
nice, thanks very much
↧
Forum Post: RE: In AMS simulation, how to increase the stop time of the analog solver?
For AXUM flow, I use a control file (amscf.scs) and set the stop time in there. Is it possible you are reading in an scs file that has a stop command?
↧
Forum Post: RE: Problems when importing properties
Thank you for the reply, oldmouldy I finally realized what the problem was: there were quotation marks in the description property. I deleted them and exported/imported correctly. .
↧
Forum Post: load skill file without starting Virtuoso but use Virtuoso API.
I hope to load a skill script directly in Bash to modify the layout and generate GDS. Is there a way to accomplish this without starting Virtuoso? Alternatively, which scripts does Virtuoso load before invoking procedures like dbOpenCellView?
↧
↧
Forum Post: RE: load skill file without starting Virtuoso but use Virtuoso API.
You can use 'dbAccess' to modify the layout (still requires the Framework licence). See this Article re. strmout... How to create GDS from layout and import GDS into Virtuoso from UNIX command line in a non GUI mode (cadence.com)
↧
Forum Post: RE: Analysis (stb): phase plots shows reversal i.e. phase plot starting from 0 degree
You might want to take a look at the discussion at web.archive.org/.../YaBB.pl
↧
Forum Post: Reuse DC solution from a specific corner in one test in the same corner of a different test
There are two independent loops in my circuit that I want to run stability analysis for. Since a Maestro Test can have only one analysis of a given type, I have two Tests. The only difference between the two tests is the terminal I specify for "Probe Terminal" in the stb analysis configuration. I am running over corners and the DC solution can take a while to converge. Is it possible to use the DC solution from my Loop1 Test in my Loop2 test? Somehow I have to match the DC solution between the two Tests corner-to-corner. I don't know how to do that. Assembler/Explorer from Virtuoso version IC6.1.8-64b.500.32
↧