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Forum Post: RE: How to get pin position and location?

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Thank you, CadAP, Now the question becomes: 1. What value should be give to variable obj? 2. How to get pin position on the Symbol, such as Top, Bottom, Left or Right?

Forum Post: RE: How to get pin position and location?

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Hi Morgan, 1. What value should be give to variable obj? Ans: Pin dbid. you can get the pin dbid and pass that as argument to the above api. 2. How to get pin position on the Symbol, such as Top, Bottom, Left or Right? Ans: Why you need pin position any specific reason, because i don't see any direct api for it.

Forum Post: RE: creating output expression while doing parametric sweep

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Hi, assuming your parameter sweeps from minimum to maximum value, how about using leafValue() for this? I did not chek if this really works, but you could try. Let VT("/signal") be the "voltage" you are talking about and "param" be your sweep parameter (actually a design variable) that you sweep from value a to value b. The first voltage of your sweep then is leafValue( VT("/signal") "param" a) the last voltage is leafValue( VT("/signal") "param" b) so the difference is leafValue( VT("/signal") "param" b)-leafValue( VT("/signal") "param" a) Here, you get a difference waveform, but that should work with a scalar value as well (like taken by " value(VT("/signal") timepoint) "). For that to not evaluate for each point, you need to select the right EvalType (e.g. "sweeps" or "all") or ignore the result for all values of param but the last one. The downside is, you still have to enter "a" and "b" manually into your output expression before starting the simulation. If you are interested in only min an max, then I guess a = ymin(VAR("param") ?overall t) b = ymax(VAR("param") ?overall t) can do the job for you.

Forum Post: Automating Channel Flow Simulation Using Fidelity Python API: A Step-by- Step Guide

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The Fidelity 2024.1 script file guides users through essential operations, ensuring a seamless workflow. Key features include geometry creation and domain setup, comprehensive meshing, simulation, and postprocessing. The script provides flexible and efficient techniques for each step, allowing for customizable setups. It also covers postprocessing techniques to analyze results effectively and gain insights from simulations. https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1OPP000000nbzJ2AQ&pageName=ArticleContent

Forum Post: RE: How to get pin position and location?

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Hi CadAP, 1.When I use code: $portInst GetId $lStatus, get the pin ID, and pass it to DboPortInst_sGetHotSpotX, it error; 2.Get pin position to place wire, if the pin is on Top, the wire will go to top from pin hotspot; if the pin is on right, the wire will go to right from pin hotspot, so must know the pin position on the Symbol.

Forum Post: RE: How to get pin position and location?

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Hi Morgan , 1.When I use code: $portInst GetId $lStatus, get the pin ID, and pass it to DboPortInst_sGetHotSpotX, it error; Ans: DboPortInst_sGetHotSpotX $portInst $lStatus -- correct command. 2.Get pin position to place wire, if the pin is on Top, the wire will go to top from pin hotspot; if the pin is on right, the wire will go to right from pin hotspot, so must know the pin position on the Symbol. Ans: Need to create a script to get pin position. I'll create a sample and share it with you.

Forum Post: Clock as Data Constraints

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Hi, I have several logic constructs where one clock samples another clock, such as phase detector, where the D pin of the flop is a clock. When running "report_timing -lint", genus is reporting "Sequential data pins driven by a clock signal". How do I set up the constraints to handle this? Thanks!

Forum Post: RE: How to traverse layout hierarchy?

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This is what I use for layout/schematic hierarchy lists I got this a post Open a cellview ( layout or schematic ) load the procedures Execute the command in the CIW findInstHier(geGetEditCellView()) It will output the instDb path list so you can get the inst variable values procedure(hierarchy_traversal(cellview listofNand instHier) let((newHier nextcellview) foreach(inst cellview~>instances listofNand = cons(append1(instHier inst) listofNand) ) foreach(inst cellview~>instances if(inst~>isAnyInst then if(rexMatchp("symbol" inst~>viewName) then if(ddGetObj(inst~>libName inst~>cellName "schematic") then nextcellview = dbOpenCellViewByType(inst~>libName inst~>cellName "schematic" "schematic" "r") else nextcellview = nil) else if(ddGetObj(inst~>libName inst~>cellName inst~>viewName) then nextcellview = dbOpenCellViewByType(inst~>libName inst~>cellName inst~>viewName "maskLayout" "r") else nextcellview = nil) ) when(nextcellview newHier = append1(instHier inst) listofNand = hierarchy_traversal(nextcellview listofNand newHier)) ) ) listofNand )); end of hierarchy_traversal procedure(findInstHier(cv); instance hier path let( (cv1 instofNand listofNand instHier ) foreach(inst cv~>instances instofNand = cons(list(cv inst) instofNand)) listofNand = foreach(mapcar x instofNand list(cv x) x) foreach(inst cv~>instances when(inst~>isAnyInst if(rexMatchp("symbol" inst~>viewName) then if(ddGetObj(inst~>libName inst~>cellName "schematic") then cv1 = dbOpenCellViewByType(inst~>libName inst~>cellName "schematic" "schematic" "r") else cv1 = nil) else if(ddGetObj(inst~>libName inst~>cellName inst~>viewName) then cv1 = dbOpenCellViewByType(inst~>libName inst~>cellName inst~>viewName "maskLayout" "r") else cv1 = nil) ) when(cv1 instHier = append1(list(cv) inst) listofNand = hierarchy_traversal(cv1 listofNand instHier)) )) listofNand ));end of findInstHier Paul

Forum Post: run plan - pass a filepath though the calcVal() function

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Hi all, within a run plan I wanted to run a first transient TEST0, save the final nodes operation point (the writefinal inside the transient options) and then retrieve the saved file in a second transient TEST1 as a nodeset or initial conditions. I've added an output DIR = openResults() that correctly return the path of the simulation. I want to give this path as a variable for the second transient, but it seems that the function calcVal("DIR" "TEST0") return nil. Can I use the calcVal function for string too? Or is there other functions more suitable? Thanks! Nicola

Forum Post: RE: report file

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I wrote the attached skill routine to convert the old format (.rpt) into the new format (.log): to use it you need to run the following commands: skill 'load "rpt_update.il"' skill rpt_update community.cadence.com/.../rpt_5F00_update.zip

Forum Post: RE: run plan - pass a filepath though the calcVal() function

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Update: if I don't use the run plan, the variable is correctly taken as a variable in the following simulation! However, I get the follwoing error because the new variable starts with / (as in a path) and not with the ", as it should be for a string. Ignoring for the moment the issue with the run plan, how can I solve this?

Forum Post: RE: How to get pin position and location?

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I didnt get this one. Could you please elaborate.

Forum Post: Issue with Level=3 MOS model in Spectre

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Hi, I am trying to simulate the FET model that I downloaded from the manufacturer. I have always been able to use Spice models by using the statement: simulator lang=spice before the model. But this time it complained on a statement: B11 3 2 I= V(13,0)*I(V11) It said that the master was unknown. After struggling a bit I decided to just write the model subckt as spectre syntax. I did that. For 2 .model statements inside I just put the "simulator lang=spice" statement before them and then "simulator lang=spectre" after them This helped the simulation to run but the FET characteristics are totally off. I know the model is fine since I simulated it in Spice. The FET characteristic is totally set by the nmos .model defined in the subcircuit. The model is a level=3 model and now I am considering whether I need to translate the model to Spectre. But I am not able to find how to translate a level=3 spice model to spectre because don't know what master name to use in the model statement. Any guidance in this would be greatly appreciated.

Forum Post: RE: Need Help Exporting ODB++ from OrCAD 16.2 Layout – GW2ODB Executable or Alternatives?

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What is the latest release you're license entitles you to? I use the current ODB exporter between Allegro 16.6 to 24.1. We are over the hump abandoning PADS but still need to translate so... 16.6.

Forum Post: RE: report file

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I made a few changes to show the missing data as "" community.cadence.com/.../6215.rpt_5F00_update.zip

Forum Post: Spice Behavioral Current Source - Does not have a valid master

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I am using an external SPICE model and the model defines a voltage dependent capacitor as follows: C11 11 12 1E-12 V11 11 0 0Vdc B11 3 2 I= V(13,0)*I(V11) E11 12 0 3 2 1 E12 13 0 VCVS PWL(1) 12 0 -20.0,287.92 ....... When I run this Spice model in Spectre with the statement simulator lang=spice I get the following error: The instance `B11' does not have a valid master. From the Spectre User Guide Spice compatibility section it does say that it supports SPICE behavioral sources. Why then it cannot recognize this behavioral source?

Forum Post: RE: Python based scripting on Cadence SPB

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Hi mahimag , Thanks for reply. I am looking completely pythonic way of automation. [0] something like if above not available, how about the below options [A] TCL script for DRC [B] system cmd based .bat run SKILL script for DRC or RAVEL script for DRC. Please let me know if A and B are possible?

Forum Post: Spectre error: parameter range violation

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Hi all, I’m encountering error in Virtuoso ADE L during Spectre simulation for a BSIM-CMG device model: Error found by spectre during initial setup. ERROR: pmos: Model parameter NSD=1.00e+25 should not be less than 2.00e+25 Warning from spectre during initial setup. WARNING (CMI-9000): M0: Warning: VSAT(300.150000) = 850.555 is less than 1K, setting it to 1K. WARNING (CMI-9000): M0: Warning: VSATCV(300.150000) = 850.555 is less than 1K, setting it to 1K. Is there any method to downgrade the first error to a warning or bypass the parameter range check so the simulation won't terminate? Thanks in advance for any suggestions!

Forum Post: RE: Cadence Allegro 17.4-2019 not responding when launching on Windows 11 22H2

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Hi John T, I am also experiencing the same issue. I have the same version on Windows 11. However, the solution you provided din does not solve my issue. I also read an article similar to this issue but did not work. Link: PCB Editor not responding when it starts - Allegro X PCB Editor - PCB Design & IC Packaging (Allegro X) - Cadence Community I am hoping for your help. Thank you in advance.

Forum Post: RE: Spice Behavioral Current Source - Does not have a valid master

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I'm not sure which version of Spectre you're using, but in SPECTRE23.1 at least it fails with a different error for me, indicating that the "B" line is modelled as an IBIS source and the IBIS file is missing. From my checks, the "B" prefix is for IBIS sources in other SPICE simulators too so we have followed that when using SPICE syntax. If you want this to be a behavioural current source, change B11 to I11 and that should do it. Andrew
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