In addition to the approach using a layout, one could write a script that passes the top module of the design to the schematic and fills it. Content of the "schematic_fill.tcl" script is below. You would invoke it like: irun myfile.vg -y mylibs/tsmc18 -simvisargs "-schematic -input schematic_fill.tcl" +gui -s -access +rwc -createdebugdb schematic_fill.tcl: # Get the current design, add it to the schematic, and fill it. array set info [simcontrol info] set scope [lindex [split $info(Design) ":."] 1] # Attempt to select it. select set -type scope $scope # Check if we have something selected. if {[select get -type scope] == ""} { # Nothing selected. Try selecting ":" scope for VHDL. set scope ":" select set -type scope $scope if {[select get -type scope] == ""} { error "Unable to extract top level scope from design." } } # Add the selected scope to the schematic schematic add -selected # Fill the scope schematic invoke Edit>FillModules Please give this a try. Thanks. - Doug myfile.vg -y mylibs/tsmc18
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