Hi, Guangjun, Thanks for your reply! The volatage net incudes VDDH, VDDL. I use " set VDD_VALUE 1.20 set VDDS_VALUE 0.60 set_pin_vdd -supply VDDH ls_cell OUT ${VDD_VALUE} set_pin_vdd -supply VDDL ls_cell IN ${VDDS_VALUE} set_var voltage_map 2 ". But the results is different from a reference lib. There is still no input/outpt_voltage_map. Besides, the define_arc still have some problem. Regards, fengye
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