Forum Post: RE: netlist generated by ADEXL doesn't match with ADEL
Not entirely sure you want to run this way (you can, but not sure why you want to do it), but the default changed in an IC616 ISR. You can do: envSetVal("adexl.testEditor" "showAllMenus" 'boolean t)...
View ArticleForum Post: RE: netlist generated by ADEXL doesn't match with ADEL
Hi Andrew, thank you for your reply and for your help. Yeah, the way you indicate it's much better than modifying the test environment for every specific corner, so I'll follow your advice. Thank you...
View ArticleForum Post: RE: Allegro screen white out
It isn't a matter of setting, the problem occurs after the windows update
View ArticleForum Post: RE: Simulation of standalone LNA IC
Why not just add a 1pF capacitor in the test bench?
View ArticleForum Post: RE: How to create a polygon shape when it has the limition...
Charley, You would have to break up the polygon yourself into smaller pieces. Whilst OA itself supports more than 4000 vertices (I'm not sure there's an actual limit) there are various limits in...
View ArticleForum Post: RE: How can I simulate 'PLL Noise PSD' ?
You've posted on the end of a 3 year old thread which was talking about a capability which was end-of-life even then and has been removed from the tools. So that's why there's no help about the noise...
View ArticleForum Post: RE: PCell Instance inside PCell Callback Issues
You may be able to workaround this with this: unless(isCallable('aelSuffixNotation) procedure(aelSuffixNotation(num @optional _precision) let((numStr) numStr=case(type(num) ((string symbol) num)...
View ArticleForum Post: RE: Stacked Vias
Adi, The forum guidelines ask you not to post on the end of old threads - the thread you posted on was 7 years old... There is (in IC617 - at least in recent versions) viaGenerateViasAtPoint() which...
View ArticleForum Post: Error SFE-23 (undefined model or subcircuit modp and modn) and...
Dear Cadence Community I've got some serious problems which i need to solve as soon as possible. I'm a new Cadence user, i've tried to launch ADE and unfortunately i can't make any simulations because...
View ArticleForum Post: RE: Error SFE-23 (undefined model or subcircuit modp and modn)...
Hi Dominik, Oh dear - you really do appear to be trying random things which will stand no chance of working. Often design kits will set up the model path automatically to ensure the models are defined...
View ArticleForum Post: RE: Error SFE-23 (undefined model or subcircuit modp and modn)...
Hi Andrew Thanks for the quick answer, I presume that the only thing I need to do is to add the right file with models ? Hit-KIt: ams_4.10 Tech:c35b4 Regards, Dominik
View ArticleForum Post: RE: how to add lvsIgnore property to a cell made by myself.
OK, I didn't realise you were doing it on a hierarchical component rather than a leaf cell. If you do that, it omits the instance line, but still netlists the underlying schematic as a .subckt - it...
View ArticleForum Post: RE: Error SFE-23 (undefined model or subcircuit modp and modn)...
Hi Dominik, I think (I haven't used an AMS hit kit for a few years) that you have to include /spectre/h35/cmos35.scs (it might be h35, or s35, or c35), and you'd need to specify an appropriate section...
View ArticleForum Post: RE: Error SFE-23 (undefined model or subcircuit modp and modn)...
Hi Andrew, I'll try to do so, Thanks for help and advice. Regards, Dominik
View ArticleForum Post: RE: Import physical view doesn't include all pins.
My understanding (without doing experiments to prove this) is that load physical view will only copy pins across if the nets/terminals are in the target view (i.e. the source schematic view had...
View ArticleForum Post: RE: AMS Simulator in cadence virtuoso
To answer (rather belatedly) your original question about saving the internal variables, bring up the test editor (double click on the test name in ADE XL) and then Outputs->Save All and set the...
View ArticleForum Post: RE: Accessing ADEXL outputs from Ocean
Eric, This is much harder than it should be (I think an enhancement in this area would be worthwhile). The RDB doesn't contain the waveform data, so the value slot for something with a waveform will...
View ArticleForum Post: RE: No connection module found:Need an input port of continuous...
Maybe you've not compiled your connect modules and connect rules? Also, you might find it easier using irun rather than the three-step (ncvog/ncelab/ncsim approach). I suggest you contact customer...
View ArticleForum Post: RE: PVS-QRC flow and QRC_Advanced_Modeling licence
Search in the QRC documentation for "Advanced Modeling" and you'll find there are a few features needed for modeling technologies 32nm and below that require the QRCX320 Cadence Quantus QRC Advanced...
View ArticleForum Post: RE: I installed a new GF55lpx PDK, and I when I run PVS-QRC, I...
Steve, Most likely this is because you have the settings on the Netlisting tab of QRC incorrectly set. If you have them set to "Include Model" for the two parasitic entries, it will end up adding a...
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