Forum Post: RE: Process Design Kit (PDK) Development for particular technology
Hi Farhan, As part of the EuroPractice scheme you should be able to access to support.cadence.com (not for submitting cases to support, but for reading the material there). I suggest you contact one of...
View ArticleForum Post: RE: Temperature Evaluation
Rafael, We don't really have anything to do this currently. There are some tools from the PCB side (Sigrity) which do this, and there are some hooks in the digital implementation world for doing...
View ArticleForum Post: RE: How to set leTreeForm->treeOption->value in IC 6.1.7 (ISR7)...
Charley, There was a change in IC617 that the leTreeForm variable is only created the first time the form is used (it is initialised to nil in IC617). I don't know why this change was made (a quick...
View ArticleForum Post: RE: How to set leTreeForm->treeOption->value in IC 6.1.7 (ISR7)...
Hi Andrew, Yes, I used to launch the command to that. I will try the command. Thank you, Charley
View ArticleForum Post: ocean scripting
Hi everyone, If I want to send to a file data from a particular mosfet parameter, say the mosfet current id, I can do: ocnPrint(?output " / " getData("M0:id")) Now, what if I want to send the data...
View ArticleForum Post: Access design variables from Verilog-A file
Hi, I wonder if there are any way to access design variables in ADEXL from a Verilog-A file during a transient simulation? I am sweeping a design variable in my ADE-XL session and running several...
View ArticleForum Post: QRC with dspf output view: no library cells in the instance...
Hello, I would like to do post-layout simulation of a design that uses standard cells by creating a spice compatible netlist (to be able to use it with ELDO). The problem is that when I use the...
View ArticleForum Post: RE: Nonlinearity Separation
A pretty good presentation about the Distortion Summary is available at https://www.cadence.com/cdnlive/library/documents/2014/sv/CUS102.pdf . And thanks to CCR 1260324, phase information was added in...
View ArticleForum Post: RE: Access design variables from Verilog-A file
Solved. 1. Define a parameter inside the model. 2. In the instance of the model, set the parameter to the design variable. 3. The parameter can now be used in the model.
View ArticleForum Post: RE: Nonlinearity Separation
Thanks Frank for the link to that presentation - I agree, it's a very useful and practical summary of using this capability. Regards, Andrew.
View ArticleForum Post: RE: Most efficient db function to move all shapes in a design?
Although IC5141 is not officially supported, it also sounds like nothing you are trying to do is necessarily specific to that version, the SKILL side of things is probably more-or-less the same. I...
View ArticleForum Post: RE: Most efficient db function to move all shapes in a design?
Thank you both for your responses. Andrew, I am opening a case to look into the issue I am having with dbGetOverlaps(). I agree, the main issue has to do with the difference in how dbGetOverlaps() and...
View ArticleForum Post: RE: Connectivity of SMD Pad With Drill Array
Thanks for your input redwire, but it doesn't really address my detailed question.
View ArticleForum Post: RE: Most efficient db function to move all shapes in a design?
One more thing to try/think about - have you tried the Yank and Paste commands? leYankFigs() (not sure if that's present in IC5141, but leHiYank() should be), and then lePasteFigs()/leHiPaste() -...
View ArticleForum Post: RE: Most efficient db function to move all shapes in a design?
I recall having performance problems in 5.1.41 when dealing with many flat shapes. I was able to get much better results after pre-allocating some memory to help eliminate garbage collection. If I...
View ArticleForum Post: RE: Passing arguments from irun command line to top module
How would you pass an enum to the defparam? I get weird numbers in the parameter. Thanks in advance, Al
View ArticleForum Post: RE: Connectivity of SMD Pad With Drill Array
It clearly does. Your experience is just not there yet to recognize that I gave you full answer. Good luck hunting. Next time be a bit clearer and more polite!
View ArticleForum Post: RE: Most efficient db function to move all shapes in a design?
Thanks for the tip Lawrence. leYankFigs() and lePasteFigs() works much faster - seconds - graphically. But I get no results in my new layout when trying Yank and Paste in -nograph mode. I get an empty...
View ArticleForum Post: verilogA inlude search path
Dear All I have a couple of questions about verilogA, one on search path for include files and the other on using veriloga model without creating a veriloga view. First, related to the search path for...
View ArticleForum Post: RE: Passing arguments from irun command line to top module
Is this what you're referring to: typedef enum bit {NO, YES} bool_t; module test; dut dut (); defparam dut.p = NO; endmodule module dut (); parameter bool_t p = YES; initial $display ("p is %n", p);...
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