Forum Post: RE: Utility to output a single symbol from a design
Hi Jim, Nice utility. Great example of the usefulness of Skill. I'm curious about the reason for putting functions inside functions. It's unusual to me but probable stems from your experience with...
View ArticleForum Post: RE: Passing user defined properties from OrCAD Capture to OrCAD...
go to: C:\Cadence\SPB_16.6\tools\capture\allegro.cfg add your user property in allegro.cfg [ComponentDefinitionProps] ALT_SYMBOLS=YES . . . component_type=YES in Create Netlist > PCB Editor tab;...
View ArticleForum Post: RE: BOM_IGNORE property in Capture not passing to reports in PCB...
go to: C:\Cadence\SPB_16.6\tools\capture\allegro.cfg add BOM_IGNORE property in allegro.cfg [ComponentInstanceProps] GROUP=YES . . . BOM_IGNORE=YES Create Netlist > PCB Editor tab; check Allow User...
View ArticleForum Post: RE: Modify the resistivity of M1
It's a shame you didn't mention that at the beginning. What you need to do is modify the technology data for Calibre xRC, which as you pointed out is a Mentor Graphics tool (not Cadence). Because of...
View ArticleForum Post: RE: what is the use of data.dm and constraint in each design...
The "data.dm" is what is known as a "property bag". It allows meta-data properties to be stored for a library, a cell, or a cellView (the data.dm lives at one of those three levels within a library)....
View ArticleForum Post: RE: Dimming on layout window any given area?
[quote user="venkatraman Marathi"] Is there any way to to hide layout layers in given location? How the infoBalloon background is set? That kind of background setting also good for me. [/quote] No. Use...
View ArticleForum Post: RE: disabling local simulation in ADE
There doesn't appear to be a public, non-hack, way of doing this. ADE XL has the ability to not show the local job policy, via this cdsenv: adexl.gui showLocalJobPolicy boolean nil However, ADE L...
View ArticleForum Post: Oversampling clock and data recovery for SerDes communication
Dear Friends, I am newbie to hardware design. I have a task to design a burst mode CDR. Typically it should have very fast frequency acquisition time. In my system, I have a 8 phase clock input. I am...
View ArticleForum Post: RE: disabling local simulation in ADE
Thank you Andrew for your time and input. If time permits, could you please guide us on the skill way of doing it ? Best Regards, Gaurav Kr.
View ArticleForum Post: RE: disabling local simulation in ADE
If you mean a SKILL way of setting that cdsenv var for ADE XL, then that would be: envSetVal("adexl.gui" "showLocalJobPolicy" 'boolean nil) If you mean a SKILL way of implementing this for ADE L, then...
View ArticleForum Post: RE: Utility to output a single symbol from a design
Hi Dave, Thanks for the feedback and I'm glad you like it. In fact the style comes from my inexperience and the the fact that I sometimes have had problems passing multiple returning values from...
View ArticleForum Post: LVS Calibre check fail
Hi all, I ran a design use EDI, and there is no short violations when checking with EDI tool. But, when checking LVS by Calibre, there are many Discrepancy in LVS report. A part of report is below:...
View ArticleForum Post: Checking against text from a file
Hi All, I have a file i want to read. This file consists of lines like RUN DRC YES RUN LVS YES POWER NAMES VCC VCCA i have some outputs of Buttons and stringFields from a GUI that i set to a string...
View ArticleForum Post: Getting the time point in the calculation
hello all. I am looking to create a waveform. How do I use the x point value as a point? I.e.: wave(time) = average( VT(net1) time )
View ArticleForum Post: RE: Checking against text from a file
i want to clarify that i would be checking setPowerNames to then line POWER NAMES VCC VCCA compare setDrcSwtich to the line RUN DRC YES and so on. So that if setDrcswitch = "RUN DRC NO" and then line...
View ArticleForum Post: Skill Code Need to Toggle Path or Path Segment Width
Hi, I need a skill code in which I can toggle the path or path segment width from list(0.1, 0.15, 0.2, 0.3) and when the metal width is 0.3 then it will loop back to 0.1. I have the following script it...
View ArticleForum Post: Confusion about DRC / LVS / Parasitic extraction tools
Hello, I am trying to install Cadence verification tools in my university but I am totally lost to choose packages. I will use GF8HP and GF8RF PDK through MOSIS. So, I installed Assura for DRC and LVS....
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