Forum Post: RE: Loading, viewing, printing or converting Orcad V3.22...
Thanks. I moved the SCH, LIB and STD.CFG to C:\Orcad and \Library and \Driver but still no success. However, now it appears to be loading the Libraries, I get messages Decompiling/Compiling for each...
View ArticleForum Post: RE: Compare Netlist Files
PCB Design tool will tell roughly which parts have been added. For the best results pstxnet.dat and pstxprt.dat should be compared using a custom program.
View ArticleForum Post: RE: Orcad Capture: Hide Pin Numbers Without Editing Part
If you mean with respect to printing, yes you can hide pin numbers at print time (Options->Preferences). For allowing a second part with hidden pin numbers, that should only take 30 seconds or less...
View ArticleForum Post: RE: resistor noise simulation by transient analysis
hi, Andrew I have remove the isin source and replace idc by vdc and set the vdc =100mV, but cannot simulate the noise, for ideal current or voltage source, net current and voltage will be locked or...
View ArticleForum Post: Provide high effectiveness of PCB and PCBA service
Hi， This is Danior from MKTPCB. We can provide. 1):All kinds of PCB Fab such as PCB copy, Aluminum PCB, Rigid PCB, Multilayer PCB and Metal Core PCB etc. 2):Component procurement 3): Assembly of PCB...
View ArticleForum Post: Sampled point inaccuracy in AMS simulation
Hello, I am trying to simulate a Verilog-AMS model of an ideal ADC, together with some Verilog-A and Verilog modules. Versions of the tools I use: virtuoso : IC6-1-6.64b.500.11 spectre :...
View ArticleForum Post: RE: Sampled point inaccuracy in AMS simulation
That's quite hard to debug without seeing the complete example. If you could provide the whole ADC model and a simple test bench that shows the problem, that would help. Otherwise, please contact...
View ArticleForum Post: RE: resistor noise simulation by transient analysis
Plot the current through the voltage source, rather than the voltage across the resistor, which will of course be constant (because it's being driven by an ideal source). You can have the DC current...
View ArticleForum Post: RE: How to merger boards in Orcad Panel Editor
Fabricators have an optimal workflow of saving one image in a multi-up panel artwork, blow away the rest, optimize for their fab process, then re-copy to make the assembly panel. As far as I know,...
View ArticleForum Post: Propagation Delay Analysis
Hi Everyone, I have a PCB that has very different propagation velocities on the outer layers (microstrip) vs the inner layers (stripline). As a result, total etch length is not enough to satisfy my...
View ArticleForum Post: How to select shapes overlapped by a text or label ?
Hi All, How to select shapes such as rectangle in the layout that is overlapped by a label name "vref_1 " or "vref_2" or" vref_3" ?, by using SKILL and rexMatchp ? Best regards, Marben
View ArticleForum Post: Help with understanding of vsin source in PSPICE
Note from moderator - this was part of another thread in the Custom IC Design forum but was inappropriate for that forum, so moved to the PCB Design forum. Hi, can you explain one moment. I'm trying to...
View ArticleForum Post: RE: Help with complete understanding of "vsin" source in Cadence
First of all, please read the forum guidelines - they ask you to not post on the end of old threads, and also to provide enough information - you've not really done that. A few questions: Please...
View ArticleForum Post: RE: How to select shapes overlapped by a text or label ?
I'd probably use pcre functions, but the principle is similar (you only need to use the rex functions if using IC5141): cv=geGetEditCellView() labelPat=pcreCompile("^vref_[123]$") foreach(shape...
View ArticleForum Post: RE: Help with complete understanding of "vsin" source in Cadence
First time in working with software i have problem with simple step( creating of AC source). Sorry, but i can't to upload screeshots on this forum as well as i can't produce AC voltage in ORcad Capture...
View ArticleForum Post: RE: Help with complete understanding of "vsin" source in Cadence
You've posted this in the wrong forum. Orcad questions should go in the PCB Design forum rather than the Custom IC Design forum - this is the importance of specifying which tool you're using, and...
View ArticleForum Post: RE: Sampled point inaccuracy in AMS simulation
Hello Andrew, thanks for your reply. Here is a simple test case which includes: -the ADC model -two ideal voltage sources for input sine and clock -an electrical to logic interface to create a...
View ArticleForum Post: RE: How to select shapes overlapped by a text or label ?
Hi Andrew, The code works exactly as I want it. You're a genius. Thank you very much. Best regards, Marben
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