Forum Post: Automatic naming of ADEXL history items
Hello all, I'd like to try and automatically name my ADEXL history items using some information about the run. For example, instead of Interactive.0 , I could envision having the date and time, and a...
View ArticleForum Post: PCB Part - Ref Des
Hello, a quick question - when creating a part and then assigning a Ref Des name to the -part I am using the default "REF" (Silkscreen_Top) Ref Des button and the text on the Silkscreen_Top is "REF"...
View ArticleForum Post: Hierarchy Editor: Instance bindings @ 2nd level of hierarchy depth
Hi all, Suppose I have a cell Top that instantiates two copies of a cell A (instances: A_I0 and A_I1). And suppose A instantiates a cell B (instance: B_I0). Should I be able to set the view...
View ArticleForum Post: RE: PCB Part - Ref Des
The Ref Des text is really just a place holder used when the component is placed and the real Ref Des from the netlist is assigned. In the Part (.dra) I have always assigned the Ref Des Prefix that I...
View ArticleForum Post: Negative Image Thermal Relief Pads
I've created all my artwork, and everything looks great except I'm not seeing my negative image thermal pads. How do I get them to appear?
View ArticleForum Post: How can I use a vpwlf source with design variable for filename in...
I found the same topic for the spectre simulator: support.cadence.com/.../cos ;solutionNumber=11366978 But actions discribed there not suitable for "AMS Unified Netlister". UNL take the cdf simulation...
View ArticleForum Post: RE: ALT+key shortcuts are not available in 17.2 also on the...
I hope for solving this problem, soon as possible. Thanks.
View ArticleForum Post: RE: Negative Image Thermal Relief Pads
In the board file try Setup -Design Parameters - Display tab and make sure Thermal pads are enabled, for the artwork - make sure that the relevant artwork film has the Plot mode set to Negative. That...
View ArticleForum Post: RE: Hierarchy Editor: Instance bindings @ 2nd level of hierarchy...
Hi Phil, You need to switch to occurrence binding rather than instance binding. This is the circled button in the picture below, and then the text changes at the top of the tree to say Target:...
View ArticleForum Post: RE: Hierarchy Editor: Instance bindings @ 2nd level of hierarchy...
Hi Andrew, Exactly what I was looking for. Thanks so much! Cheers, Phil
View ArticleForum Post: RE: Batch print/plot from virtuoso
I got my code written. It works wonders. Saved me a lot of time. Thx
View ArticleForum Post: Automatic VIA Drop for same NET
Hello, I am interested to automatically drop VIA using SKILL procedure/command for the same NET. For example: I have a MESH of Metal2 and Metal3 lines with same NET = VDD. Is there a command to Drop a...
View ArticleForum Post: RE: Orcad Capture: Hide Pin Numbers Without Editing Part
You have the change the part in library and then update it in the design cache. Open the part in the library then Options> Part Properties... Change Pin Viability to false. Save the part. Go to the...
View ArticleForum Post: Cell only in schematic but not layout
Hi, Is is possible to have a cell that only exists in the schematic but not in the layout and still have it LVS clean? I give one example where I know that it works: noConn from basic. I give a couple...
View ArticleForum Post: RE: Batch print/plot from virtuoso
Did you use File->Print->Plot_Scope->hierarchy ? From the top level cell of you design ? Or did you really use a custom skill script from schPlot() and lePlot() skill function ? By the way, i...
View ArticleForum Post: Printing Corner Analysis information using VerilogA module
Hi, Is there any option to print the information of process corner using verilogA module? I am actually using a verilogA module to print some of my simulation result to a file ($fstrobe). But when I do...
View ArticleForum Post: RE: Batch print/plot from virtuoso
I used the lePlot() function. I created a template lePlotOptions file with keywords and created the options file on the fly for each cell in my library by substituting the cell name, etc. Then called...
View ArticleForum Post: RE: How can I use a vpwlf source with design variable for...
In my irun.log file written (when i use UNL Netlister): Error found by spectre during initial setup. ERROR (CMI-2011): Unable to open waveform file `cds_globals.pwl_file'. No such file or directory....
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