Forum Post: RE: Files extensions
What PCB tools do you have access to? Then maybe I can move your post to the right place (it's almost certainly not this specific forum). Andrew
View ArticleForum Post: RE: Files extensions
By now I have nothing for that, and I discovered Cadence this morning.
View ArticleForum Post: Skill code to delete duplicate pin
Hi all, In my layout, I have a lot of duplicate pins. I want to delete all the duplicate pins and keep the highest metal pin. Do anyone have the skill code to do that, or know a way to do that ?...
View ArticleForum Post: How to short two nets with different names in layout.
Hello, I am using Cadence Virtuoso Layout Suite XL. I have done EMX on a line (just a metal trace) to use it as an inductor. The issue comes when I try to connect everything back in schematic/ layout....
View ArticleForum Post: RE: skill to create shape based on vias
Hi zpofrp ! Please refer this code. HoangKhoi. ; ##################################################################### axlCmdRegister("createShapeByVia" 'createShapeByVia ) (defun createShapeByVia ()...
View ArticleForum Post: RE: skill to create shape based on vias
its very nice，thank you very much.
View ArticleForum Post: RE: pcb db doctor
Hello John could you please share old version PCB viewer to me ? which can open package design mcm file @16.6 version? Below download page is latest version, it cannot open 16.6 or 17.2 version design...
View ArticleForum Post: RE: DB Doctor download?
Hello John the viewer downloaded from your link cannot open old version design file, such as 16.6 or 17.2. do you have old version PCB viewer?
View ArticleForum Post: $display() is executed immediately after simulation start...
Hello! I'm testing a small design of my own and I stumbled upon something I can't understand. When I hit 'run', I see immediately "Hello!" printed. Here is part of my testmodule: initial begin...
View ArticleForum Post: RE: $display() is executed immediately after simulation start...
It was my bad. I mixed up one code with another. I think this post can be safely deleted. Sorry for that. Alexei
View ArticleForum Post: RE: How to create a menu icon for toggling via partial selection.
Hi Aurelien and Andrew, Thank you for your response. Andrew, I am able to find it for mosiac as well using cdsenv Editor. But now I am not able to use it for a different option that I want access. Now...
View ArticleForum Post: Orcad libraries font issues
Hi, We creating Libraries. If that libraries placed in schematics outline and font changes please check below image and give solution. Lib creation After schematics placed
View ArticleForum Post: RE: HB simulation with temperature update after each run
Andrew, Thanks. I will try it. Best regards, Martin
View ArticleForum Post: RE: How to create a menu icon for toggling via partial selection.
Ganesh, The env var is called keepCopying not copyRecursive . For some reason the field on the options form is called copyRecursive (possibly it was called that during development), but you can see...
View ArticleForum Post: RE: How to short two nets with different names in layout.
Most PDKs have metal resistors available which can be used for this purpose. Andrew
View ArticleForum Post: RE: Skill code to delete duplicate pin
Hi Duc Loc, This is quite simple, here is an example: ;; Browse all nets ( foreach net ( geGetEditCellView ) -> nets ;; Delete pins on the same net ;; Pins are sorted by layerNum and first one is...
View ArticleForum Post: RE: Orcad libraries font issues
Thos has been going on since version 16.6. The problem is the font, font size and font colors in the library are set to "default". This means that the settings get updated based on the user's...
View ArticleForum Post: RE: OrCAD Capture Constraint Manager: How can I populate all...
Did you try exporting and importing the constraints via technology file (.tcfx). It will allow you to export all the constraints at once and you can import the same into CM.
View ArticleForum Post: Verilog-A syntax error with user-defined function and if-else...
I want to make ELU function in the verilog-A code, but it shows syntax error continuously. But the Verilog-A document says that this is the correct syntax, so I would like to ask you what should I...
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