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Forum Post: RE: To get resistance of track

Yes use the Display - Parasitic command then click on the track (cline) you want the information for.

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Forum Post: RE: Not fitting lmax-lmin, wmax-wmin or areamax-areamin range

Hi Andrew, Your explanation sounds logical, however, when I designed the same transistors with the same dimensions in another design I don't get such error... Kind regards, Nicolas

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Forum Post: RE: Differential Pair Via Spacing

This is possible with the Allegro + High Speed option and the latest QIR for 17.2-2016 (s037). There's a video showing how to set this up https://www.youtube.com/watch?v=8P2ytJ8Y6vI&t=27s

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Forum Post: RE: Extract netlist on specific area

Yes - create a place replicate module of the circuit you want which makes a filename.mdd. You can open this by File - Open then change the files of type to mdd and open this, then use Export - Netlist...

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Forum Post: RE: Is there a way to describe the charge across the device as a...

You can upload a CSV file here. In the bit below where you type, use Insert->Insert Image/Video/File and then change the "From" to File Upload (rather than web link) - then you end up with something...

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Forum Post: RE: Not fitting lmax-lmin, wmax-wmin or areamax-areamin range

Hi Nicolas, Maybe it's a bug in the specific version of spectre you're using (seems a bit odd though), or maybe in the other design you had the option soft_bin set to models as the message says?...

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Forum Post: RE: To get resistance of track

Sorry, but in the Display menù I don't have Parasitic command .

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Forum Post: RE: To get resistance of track

So are you running Allegro PCB Designer or OrCAD PCB Professional or Standard? If it's and OrCAD level then this menu command is not available but you can extract the information in a report file. Use...

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Forum Post: RE: Not fitting lmax-lmin, wmax-wmin or areamax-areamin range

When I wanted to change the simulator options regarding the model bins, I've found out that the scaling factor of my device was 1.0e-06 instead of 1.0. Very weird, especially because I have not been...

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Forum Post: How to get a list of all instances that match a cellName in a...

Ideally, im looking to get a complete list of hierarchical instances names for a specific device type in my schematic. Eg. (/MN0 /I0/MN0 /I1/MN0 etc ....) Is there a skill command to find this ? i...

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Forum Post: RE: How to get a list of all instances that match a cellName in a...

As far as I know there is no SKILL builtin command which returns you all instances down a hierarchy - as you say cv~>instances only returns those instances on the current level. So yes you need a...

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Forum Post: RE: To get resistance of track

Thanks Steve, I tried to generate a new report with the information about nets. I had successful but in the report there are all nets. I would like to have only infos about single net or segment and...

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Forum Post: RE: How to get a list of all instances that match a cellName in a...

Unfortunately there's no "simple" way of doing it - particularly if you want to handle both view switching and configs (which complicate matters rather because the bindings get more complicated)....

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Forum Post: RE: How to get a list of all instances that match a cellName in a...

Hi Andrew...I see the problem with the config view. The code I was referring to was under the assumption that for each symbol there is a corrsponding schematic in terms of a switch list of names. I'll...

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Forum Post: RE: Bad PSpice net name on part

I'm having an issue and now I'm thinking it's related to limitations on the free/student version...

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Forum Post: RE: To get resistance of track

There is a free tool online called "PCB Toolkit" made by Saturn PCB Design.inc. The tool has a slue of calculators great for PCB development. Under the Conductor Properties tab within the tool may be...

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Forum Post: RE: How to get a list of all instances that match a cellName in a...

Hi Max, Yes, a search with a switch view list is a lot simpler - that can be done fairly simply with a short bit of recursive code. Andrew

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Forum Post: RE: Allegro PCB Designer - removing the circuitry outside of an area

Well you could try in General edit mode and fix the items you don't want deleted. here are the steps. 1. Set your select filters to include Vias, Clines, Shapes and Cline seg 2. Do a window select with...

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Forum Post: run_phase doesn't update SV interface signals

Hi, I am trying to set up a minimal UVM env to learn this methodology. My problem is that UVM driver doesn't seem to update the interface signals connected to DUT. Testbench can update it (clock and...

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Forum Post: RE: run_phase doesn't update SV interface signals

The problem is that you have defined the driver class, but you haven't instantiated it inside of anything. I suspect you'll want to instantiate it inside your env class. Here is some code from a small...

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