Forum Post: RE: cdb to oa conversion
Thanks Andrew for your quick reply. I used the GUI conversion tool to do the conversion. I get the following warnings. Message Summary: WARNING (CDBOA-406): Directory / is in a cellview. The directory...
View ArticleForum Post: RE: cdb to oa conversion
The final problem simply means that you didn't include all the relevant libraries (e.g. the basic library which is in the IC61X installation) in your destination cds.lib file. You don't need to...
View ArticleForum Post: RE: Capacitor model SystemVerilog
There is some missing code in your initial block. Can you repost the code? Tim
View ArticleForum Post: RE: cdb to oa conversion
Thanks Andrew once again :-) The reason behind the errors was the following:- During CDB to OA translation, a library named 'IOLIB_ANA_4M' got changed to 'IOLIB_ANA_4M_local'. Similarly, another...
View ArticleForum Post: RE: cdb to oa conversion
I have no idea what problem you're describing above. CDB to OA Conversion is something that has had many fixes over the years - it was very important to make it pretty robust. It's been used a huge...
View ArticleForum Post: IDF out problems to Solidworks 2016
I am having strange problems when I output an IDF file out of Allergro PCB Designer and send to our mechanical group using Solidworks. Sometimes the component height goes through, in the IDF file, and...
View ArticleForum Post: RE: IDF out problems to Solidworks 2016
Yes, it uses the PACKAGE_HEIGHT_MAX attribute to draw the height of the package. IDF has two components to it. I'm used to the PTC version, which gives two files of *.emn and *.emp. For Solidworks, you...
View ArticleForum Post: how to Import CADSTAR SPL gerber file in Allegro.
I have a PCB Antenna reference design in CADSTAR SPL gerber file and I want to copy the PCB antenna to my board design in Allegro. How can I import CADSTAR SPL gerber file to Allegro? Thanks. Kevin
View ArticleForum Post: Why gm is not zero even when iDS is a constant DC current?
I am trying to plot transconductance gm of M0 in the picture below. However, what I am supprised here is why gm is not zero when iDS is a constant DC current (1uA). gm = diDS/dvGS So according to this,...
View ArticleForum Post: RE: Why gm is not zero even when iDS is a constant DC current?
This is because gm is a parameter for the small signal model of the transistor - so effectively it's what the small signal dId/dVgs would be at that bias point. It's computed in a DC analysis (in your...
View ArticleForum Post: RE: Why gm is not zero even when iDS is a constant DC current?
Thank you very much for the help. I think I misunderstood how transconductance is calculated by DC analysis. I thought that firstly it would plot large signal iD = f(vGS, vDS, vBS) and then derivative...
View ArticleForum Post: RE: Why gm is not zero even when iDS is a constant DC current?
I had a quick look (it's the weekend so I didn't have time to spend too long looking at it) - there isn't much on exactly how gm is formulated. In the operating point parameters section of bsim4, for...
View ArticleForum Post: RE: Why gm is not zero even when iDS is a constant DC current?
Your test circuit is not correct. As others have said, the transconductance (gm) is a small-signal parameter that is extracted at any operating point. gm should not be zero under constant DC bias--in...
View ArticleForum Post: RE: Why gm is not zero even when iDS is a constant DC current?
Thanks. I have just download the latest release BSIM4.8.0 from the site . However, the code is hard to understand as there is almost no comments there. For gm, I see only one related info from "b4.c"...
View ArticleForum Post: RE: Why gm is not zero even when iDS is a constant DC current?
You're looking in the wrong place. Look in b4ld.c and search for "Gm" (particularly "Gm ="). There are comments in here (not lots, but enough to give a clue). This also has some of the calculations of...
View ArticleForum Post: ADEXL simulation results get mixed up
I've noticed something strange with ADEXL simulation. I running the simulation through LSF, where I set my max. job numbers to be 16. Then I run a simulation with 9 sweeping points. First I saw that...
View ArticleForum Post: RE: IDF out problems to Solidworks 2016
I run Solidworks on the back end and use the EMN EMP format 'cause that's my normal export. SW does not have an issue with this format. Have you tried it?
View ArticleForum Post: RE: Speed up virtuoso layout editor
Hi RVERP As you had not stated the version of Virtuoso which you are currently using, it is a little hard to know if the issue is caused by a bug or is simply due to old software. Would you please try...
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