Forum Post: RE: IDF out problems to Solidworks 2016
It is the PTC format (Choose File->Export->IDF, then choose PTC in the pulldown box) It is the most requested format that I get for 3D export
View ArticleForum Post: 2 Layer PCB Design
Hi All, I am making the PCB of SI1143 gesture control. I am making the 2 layer PCB , (Top & Bottom). I have three connections along with other connections. I have a confusion that how can I...
View ArticleForum Post: Stack up for a 4 layer RF design
Dears I am new to the tool, and I am being blind with this new assignment. 1. I want to design a 4 layer board (RF for 50e imp matching on three tracks: basically a SMA input). 2. We will be using a...
View ArticleForum Post: RE: how to Import CADSTAR SPL gerber file in Allegro.
Allegro only supports importing gerber files that it created. It might be easier to get the gerber in a DXF format that you can import.
View ArticleForum Post: RE: Stack up for a 4 layer RF design
Setup - Cross Section. There's a video:- https://www.youtube.com/watch?v=awCHJMjl6CA
View ArticleForum Post: RE: 2 Layer PCB Design
Normally by default the VCC and GND nets are not shown. Try Setup - Constraints - Constraint Manager then go to the Properties tab - Net -General Properties and look for the No Rat column. It will be...
View ArticleForum Post: RE: 2 Layer PCB Design
Thanks for the Reply. I went to route then automatic route. I did fanout. then routing. I got 10 errors in my netHi all, I'm experiencing a problem when routing through power planes. I've setup this...
View ArticleForum Post: Information box
Dear all, When I hover my mouse cursor over some Library/Cell/View item on the library manager, it displays a a little piece of text, with the name of the item. Is there a way to change/add the text...
View ArticleForum Post: RE: Capacitor model SystemVerilog
Hi Tim. this is the code of my capacitor: `timescale 1ns/1ps import EE_pkg::*; module Cap( inout EEnet P, inout EEnet N, input real cval ); parameter real rval=1; // Equivalent Series Resistor...
View ArticleForum Post: RE: Returning value from a function
Hi, Regarding the script above, I have some more questions. The script writes some configuration settings to a text file. When the script is launched for the first time it should check if "config.txt"...
View ArticleForum Post: RE: Returning value from a function
Hi José, When you open files without a directory component (so "config.txt") it will search for them using the SKILL path (getSkillPath()/setSkillPath()). If you give a directory (so "./config.txt") it...
View ArticleForum Post: RE: Information box
Hi José, No. There's an old CCR asking for this (907437) but we decided that we do not intend to implement a customisation capability for the tooltips in the library manager. Regards, Andrew.
View ArticleForum Post: RE: Returning value from a function
Hi Andrew, But how can I force it to look in the script's directory ? Thanks, José
View ArticleForum Post: Post layout simulation error in 45nm technology
Hello everyone, I want to perform the post-layout simulation for 6T SRAM cell in Cadence for 45nm technology. However, I am trying with a simple inverter first. Both the DRC and LVS are cleared. Now...
View ArticleForum Post: RE: ASSURA lvs problem
Hi Andrew, When I run LVS, the Cadence gives me the error " the schematic 'Res' is unbound to any layout device". I have checked EDABOARD and your suggestions here. But I could not figured it out. I...
View ArticleForum Post: Fast transient simulation of steady state
Hi, I would like to see the actual (i.e., not small signal) steady state response to an integrator (e.g., to get HD3). By construction, it has a huge time constant: I would need to simulate quite long...
View ArticleForum Post: Sweep over frequency and use frequency for calculations
Hello, I have the problem that I want to sweep over frequency (for example with pss) and then use the frequency itself in calculations. The problem: Not only the results traces are a vector but also...
View ArticleForum Post: After Doing Silkscreen, Not getting Component Name , Reference...
Hi All, I am making the PCB of APDS-9960. After completing the process of Artwork . I went for Silk screen. I chose Component Value: None Device Type : None Board Geometry: Silk Package Geometry: Silk...
View Article