Hi Raegaan, I don’t understand your question. What do you mean by “the stored skill codes”? Regards, Andrew
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Forum Post: RE: where and how to get stored skill files in cadence
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Forum Post: RE: where and how to get stored skill files in cadence
Hi Reagan, Your question was non-specific. Here are some directories in your Virtuoso installation that contain SKILL code examples (in subdirectories): /share/cdssetup/dfII/ /tools/dfII/etc /tools/dfII/samples and so on - these locations and the files can be found using 'find', e.g. find -type f -name '*.il' I suspect this is not what you are looking for, but then I have answered the question that was posed. Best regards, Lawrence.
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Forum Post: Spectre S-parameter analysis
I am doing s-parameter analysis using spectre "SP" analysis. Few question : 1) I have placed 40 ports ( port from analogLib) and attached to the appropriate nodes in the circuit. I have numbered them as 1 to 40. Do I need to tell the tool which ones is input and which ones are output ? 2) In the ADE analysis GUI I have given the port name in the following form. 3) Is there any way to put all the S11/S12/S13......etc in the output so that I can view them in the result analysis as soon as the simulation is done ? 4) How do I save the s-parameter result in a touchstone file format ?
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Forum Post: RE: net highliting with bindkey
Hi Andrew, Can you please explain a little on what does " schViewMenu->NetHighlights->checked=!schViewMenu->NetHighlights->checked " mean and how to do it? Or since this post is older than 4 years, is there any way to use bindkey to toggle Net Highlighting ON/OFF now? Thank you.
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Forum Post: RE: Wiring Assistant table filler
Wonder if try have one with a power outlet on the bottom you can piggy back off. Guess you could use a floor mount outlet box and cover on your table ...and figure out how to wire to the wall. Not an electrician so....
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Forum Post: RE: rod PCELL (Metal with slot)
If you are in Cadence 5.1.41 USR2 or later (I think that is the requirement), you can use some dbLayer commands. When I changed the code to simply create a metal1 shape and then create small polygons and run a dbLayerAndNot, I was able to remove the leChopShape and performance was great.
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Forum Post: RE: where and how to get stored skill files in cadence
By stored skill codes I means , the codes for each form or pcell that is ready to use.
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Forum Post: RE: where and how to get stored skill files in cadence
I am looking for this only but can you elaborate on this. with you mean my workspace?? Regards Raegaan
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Forum Post: RE: where and how to get stored skill files in cadence
Your question still doesn't make any sense. I don't know what "each for or pcell that is ready to use" means. If you're asking where the source code for Cadence tools is, then we don't provide that. We provide all the code needed to generate the forms that are part of the tools in a binary form so you can't see the source. If you're asking where the source code for parameterised cells as part of a process design kit is, then usually that's not provided by the foundry either - they either encrypt any code or have it shipped in a context file (which is a binary representation). If you're asking about code you've written (which I doubt, because of your question), then you'd know where it is. If you're asking about code written for local utilities at your site, you'd need to speak to whomever is responsible for that. To answer the question about the in your response to Lawrence's attempt to answer your very vague question, you can find that by typing cdsGetInstPath() in the CIW. It's the directory containing the software installation for Virtuoso. Andrew.
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Forum Post: RE: Wiring Assistant table filler
[quote userid="470278" url="~/cadence_technology_forums/f/custom-ic-skill/43707/wiring-assistant-table-filler/1366586"]Wonder if try have one with a power outlet on the bottom you can piggy back off. Guess you could use a floor mount outlet box and cover on your table ...and figure out how to wire to the wall. Not an electrician so....[/quote] Is this a joke? I was tempted to just mark it as spam, but I cannot see any reason why you would have posted this as spam since there's no links to anything and no promotion of anything else. You posted a vaguely reasonable response to another question so it doesn't appear that you're a bot of some sort. Andrew.
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Forum Post: RE: net highliting with bindkey
Well, there's a menu item (something called an "action" in the View menu in the schematic editor, called Net Highlighting . This is an action because it has a checkmark next to it when it's enabled. When turned on, hovering over a wire in the schematic highlights everywhere that the net is connected (even when connected by name) like this: The statement I posted simply finds the current value (as returned by schViewMenu->NetHighlights->checked ) and inverts it using the not operator (!), and assigns it back again. So this will toggle the net highlighting on or off, to the opposite state of what it is now. Andrew.
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Forum Post: RE: Spectre S-parameter analysis
Answering your questions: If you've specified the port number on the port component (in the parameter "Port Number"), and these are uniquely specified and are contiguous (i.e. you've not got a gap anywhere) then you don't need to specify the ports on the sp form. If you do specify the ports on the sp choose analysis form, then the order they are defined in on the form defines the numbering - so the first port is port 1, the second is port 2 and so on. The sp analysis then only computes the s-parameters between the ports specified on the form; if none are specified on the form, it uses all the ports in the schematic. There's no need to tell it which are inputs and outputs (in fact there's no such thing in s-parameter analysis - s parameters are computed between all specified ports and it's the numbering that defines which is which). The Sprobes field can be left blank. This is used if you've placed the sprobe component from analogLib, and as "spectre -h sp" explains, sprobe is a special testbench to allow in-situ probing of bi-directional impedances. I rather doubt you want all 1600 s-parameters plotted when you've completed the simulation. You can certainly pick the s-parameters you want via Results->Direct Plot->Main Form, pick the s-parameters you want (plotted the way you want) and use the "add to outputs" to add them into the ADE outputs. If you really want lots of them, you can export the outputs to a text file, edit the resulting CSV to add lots of rows with the many s-parameters you want to plot and re-import (via Outputs->Export and Outputs->Import in ADE L or Explorer). On the Options form for the sp analysis (at the bottom of the choose analysis form for sp there's an "Options" button), you can specify the file and datafmt parameters in the OUTPUT PARAMETERS section. Note that any relative filename (i.e. not a full path) will get written to the netlist directory. Regards, Andrew.
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Forum Post: RE: Extend Rigid-Flex!!!
the flex layers are in the center of the construction with even layer counts in both the rigid and the flex areas. In the two thicker areas, which are the rigid areas, there is an even layer count. In this example there are six layers but that can vary anywhere from four to sixteen layers or more. The key element in this design is that the flexible layers are located in the center of the construction. shareit vidmate
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Forum Post: FEV ISSUE
I see unmapped points (not-mapped) on both golden and revised side. These are all ddr scan latches. Eg- */latch_lo_gt_ctech_customlib_ddr_scan_latch[156]/o_reg in golden */latch_lo_gt_ctech_customlib_ddr_scan_latch[156]_clock_scan_latch_dt/sttb_$U4/udp1/U$1 in revised There are many not-mapped similar to above one. Below renaming rule doesn’t seem to work ren rule r1 "_clock_scan_latch_dt" "\/o_reg" -rev Could someone please help here?
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Forum Post: Post synthesis simulation with XCELIUM - SDF
hi, due to technical problem i am running simulation through terminal. Therefore, I have a Verilog file, a test bench and i have also exported from Genus synthesized netlist and sdf file. Now, how can i annotate sdf in my post-synthesis simulation using XCELIUM while using command line? thank you
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Forum Post: RE: Spectre S-parameter analysis
Thanks a lot Andrew for the detail explanation. I got all the answer to all the questions except number 4. I don't see any "Option" button. Attaching the form here :
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Forum Post: RE: where and how to get stored skill files in cadence
hi Thanks got what I wanted raegaan
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Forum Post: RE: Spectre S-parameter analysis
I've never seen that before. Your form looks very odd - for a start, there are normally 4 columns of analysis names with the default font size. You're missing the options on the bottom of the form for "Do Noise" and also the Mode (Single Ended, Mixed In/Out, Other), and the Enabled checkbox, as well as the Options button. I tried to reproduce this by making my font size very large, starting ADE, bring up the form, and the changing the font size to be default again - and bringing up the form again. I get the two columns of analyses, but not the missing fields. Can you please report: What does this return (make sure the ADE window is the current window) if you paste it in the CIW? maxnamelen=0 foreach(name asiGetAnalysisNameList(asiGetCurrentSession()) maxnamelen = max(hiGetTextWidth("label" get_string(name)) maxnamelen) ) printf("Max Length is %L\n" maxnamelen) What does this return? getVersion(t) Regards, Andrew.
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Forum Post: RE: Spectre S-parameter analysis
I get the following : (pz dcmatch stb tran envlp ac dc lf noise xf sp pss pac pstb pnoise pxf psp qpss qpac qpnoise qpxf qpsp hb hbac hbstb hbnoise hbxf sens acmatch hbsp include ) Max Length is 81 getVersion(t) "sub-version ICADVM18.1-64b.500.8 "
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Forum Post: RE: Spectre S-parameter analysis
OK, the max length is rather long (still don't know why that would lead to this problem, but worth pursuing to try to get some understanding). What does hiGetFontInfo("label") return? Also, did you get any errors in the CIW when you launched ADE or invoked the Choose Analysis form for the first time (I'd suggest starting in a fresh Virtuoso session and seeing whether that made a difference). I quickly tried in the same version as you (and hacked things to give 81 - for me it returns 47) and I get the two columns of analyses, but not the other problems. I wonder if the font metrics are messing things up - hopefully my request for info may help identify this? Andrew
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