I don't believe that there is any "turn key" way to do this but there are some SharePoint capabilities built into the Allegro Engineering Data Management products. Also, as I understand it, these require "some work" from Cadence services to get the integration with SharePoint completed. You would probably need to speak with your Cadence Account Manager, and associated Applications Engineer, to get a handle on what's involved, if you want to go down that route.
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Forum Post: RE: Allegro and SharePoint
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Forum Post: RE: Shape edit boundary operation invalid
This could be because your editing results in a Shape Boundary that crosses itself. Try a Database Check as the first instance in case there is "something else" in the database that is related to you Shape editing.
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Forum Post: RE: COmmand to find Process Name
Hi Nirmal, That is not standard Virtuoso behaviour - it's some customisation in your environment. Normally the window banner just says "Virtuoso® 6.1.7-64b - Log: /export/home/andrewb/CDS.log" Presumably somebody in your organisation knows the convention for how this window name is constructed and set? Otherwise you could potentially (in your environment) use: windowName=hiGetWindowName(hiGetCIWindow()) extractPat=pcreCompile("^Process:(\\S+) ") process=when(pcreExecute(extractPat windowName) pcreSubstitute(extractPat "\\1") ) Regards, Andrew
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Forum Post: RE: COmmand to find Process Name
Hi, I found the command. getShellEnvVar("PROCESS") The code you told also works. Thank you Regards, Nirmal
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Forum Post: how to find input impedance of common gate configuration
what is the general way to find input impedance of common gate amplifier stage. I tried to provide input as IAC mag =1 , trying to find the impedance at input node (Vin), trying to make it as(Vin/In) ,its coming as a gaussian distribution with peak of 95 Mega V at 300 Mhz. I m running a system around 500 MHz, I m sure the for common gate amplifier input impedance must be low, but its coming like this. I m not sure whether my method is right or wrong. for low frequency its coming around 350 ohm. how to calculate generally input and output impedance .
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Forum Post: RE: Allegro and SharePoint
Thanks for the response. The major issue right now is that the SharePoint links are all hyperlininks. My approach right now will be inward facing, we have a SharePoint team and I will work withem. I appericate the information. Kind Regards, Wild
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Forum Post: RE: expression problem from ac sweep
[quote userid="383860" url="~/cadence_technology_forums/f/rf-design/40910/expression-problem-from-ac-sweep/1358415#1358415"]If you are trying to measure the current through your entire varactor network, the current probe can be placed in series with the gate of the drain-source connected MOS device. Remove the 100K resistor totally. The probe will then capture all the current through the drain-source connected device and the switched capacitors.[/quote] Hello i have changed the circuit and the simulation as you said with the expression shown bellow. i added a 1A ac source and 1mH inductor the VVDC source. in the results of the formula it gives a constant capacitance no matter what VVDC voltage . where in the AC current source did i got wrong? Thanks (-1 / (2 * 1e+09 * value(imag(v("/vout" ?result "ac") / i("/IPRB0/PLUS" ?result "ac")) 1e+09) * pi))
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Forum Post: RE: layout instances name connected in a selected net.
Hi Andrew! Is there any way to obtain the devices connected on a net from the schematic view?
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Forum Post: RE: layout instances name connected in a selected net.
[quote userid="415245" url="~/cadence_technology_forums/f/custom-ic-skill/14672/layout-instances-name-connected-in-a-selected-net/1358429#1358429"]Is there any way to obtain the devices connected on a net from the schematic view?[/quote] Please read the Forum Guidelines . You've asked a question in a 9 year old thread which is about layout instances, and you're asking about instances on a schematic. So that's at least two of the forum guidelines broken. I suggest you start a new post.
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Forum Post: RE: layout instances name connected in a selected net.
Hi Sttrotta, Something like these. /*============================================================================================================ Purpose : Displays devices lists that are connected in a selected net or wire in the schematic and higlights all its connection. It can be use for tracing connections in schematic. Process : Any process Environment : VXL schematic editor , this skill file can also be run in VXL layout editor. How to run : 1.Enter in CIW. load("/home/marben/SKILL_VXL/net_selected.il") 2.Select a portion of net or wire in the schematic window, then move the cursor in the CIW, then press 2 in the keyboard. 3.All devices connected to that net will be automatically displayed in a text file, netConnection_layout.txt will be automatically created in user's VXl directory. Function Name : net_selected() Language : SKILL Date created : February 17, 2010 Author : Marben F. Orallo =============================================================================================================*/ ;hiSetBindKey("Command Interpreter" " 2" "net_selected() ") hiSetBindKey("Layout" " 2" "net_selected()") hiSetBindKey("Schematics" " 2" "net_selected()" ) procedure(select_side() foreach(fig geGetSelSet() net=fig~>net ) foreach(fig net~>figs geSelectFig(fig)) ) procedure(net_selected() csh("touch ./netConnection_layout.txt") outPort = outfile("./netConnection_layout.txt") foreach(fig geGetSelSet() net=fig~>net when(net printf("net %s is connected to\n" net~>name) foreach(instTerm net~>instTerms printf("%s.%s " instTerm~>inst~>name instTerm~>name) ) printf("\n") ) fprintf(outPort " Net %s schematic connection are :\n\n" net~>name ) ;fprintf(outPort "net %s is connected to\n" net~>name) foreach(fig geGetSelSet() net=fig~>net when(net foreach(instTerm net~>instTerms fprintf(outPort " Pin %s of instance name %s , cellname = %s \n" instTerm~>name instTerm~>inst~>name instTerm~>inst~>cellName) ) ) ) ) ; start of outport fprintf(outPort " \n\n\n >>" ) fprintf(outPort " \n\n End of schematic net connection list . " ) fprintf(outPort " \n\n >>" ) close( outPort) ;view("./netConnection_layout.txt" list(0:0 500:500) "SCHEMATIC NET CONNECTION") ; edit("./netConnection_layout.txt") ;hiRegTimer("system("open_net_selected")" 100) sleep(3) system("gedit netConnection_layout.txt &") ; End of outport select_side() )
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Forum Post: RE: expression problem from ac sweep
Dear Yefl, > in the results of the formula it gives a constant capacitance no matter what VVDC voltage . > where in the AC current source did i got wrong ? You did not set the DC potential at your top node vout to be anything. Hence, it is floating and will take on the same value as your applied control voltage (vvdc). Hence, there will be no change in capacitance as you change the control voltage vvdc. > another problem is why we dont calculate the capacitance from the OUT node signed in red? > the VCO will look at the capacitance from that point,so we do need to put the iprobe there and VOUT there > am i correct? I was wondering where the VCO node was. Please use the circuit shown in the attached file to measure the capacitance as a function of your control voltage: Shawn
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Forum Post: RE: iPad files manager
you have to Jairbreak to do that Regards, Lisa
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Forum Post: RE: transient output file option in pspise
I include a file and it works but data has been written into output file. Is there any way to write data into a separate file? because when I want to use this data in MATLAB or another application, output file has other information too, that I don't need them and it became a little hard to work.
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Forum Post: RE: ncsim: Error within protected source code.
It is not possible to ncsim error within the protected source code and you can follow some good methods to do it with the help of third-party applications which are rolled out by McAfee Customer Service Hope this helps you out with your queries.
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Forum Post: RE: expression problem from ac sweep
Hello , i have made the test bench as you described and i got results. but in our VCO as shown bellow there is no ac current source,so how it's equivalent regarding the impedance that it will present in the actual system? another thing is how do you suggest connecting it to the VCO? in our varactor there is no "two sides" as in the capactior shown in the schematics bellow. Thanks.
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Forum Post: RE: Voltus-Fi XL in ADE with dspf: how to reliably start 'shapeSever'
Cadence Support Troubleshooting article: VoltusFi : Failed to start QRC module 'shapeServer'
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Forum Post: QRC Assura Extraction failing !
Hi I'm trying to run parasitic extraction on Assura QRC, and the run is failing. The log file says that it couldn't get the library models for the NMOS, PMOS. Something like this: My setup is as follows: Can someone tell me what's going wrong? Andrew Beckett Tawna ?
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Forum Post: RE: QRC Assura Extraction failing !
Hi Aalhad You had encountered a licensing error as indicated in the log file. Quantus XL license is required for the extraction but the license is not available. Best regards Quek
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Forum Post: RE: embedded telemetry receiver
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Forum Post: RE: SKILL code to print all the labels in a layout view to a file
Hi Andrew, In the above script, is there a way to find the coordinate location of a label? Thanks, Mallikarjun
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