I suggest you contact customer support . It's a rather unusual use model, but I'm not aware of any limitation with the maximum number of history entries. I suspect the likely issue is that the parent ADE session is unable to keep up with the messages coming back to it from the spawned processes, but that's just a guess. Andrew.
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Forum Post: RE: Limited History Entries?
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Forum Post: RE: Validate idial inductor using Yparam expression
Hi Shawn, Thanks for re-posting, although it is actually there - here's the link: https://community.cadence.com/cadence_technology_forums/f/rf-design/41676/validate-idial-inductor-using-yparam-expression/1360601#1360601 What seems to happen is that the forums collapse some of the posts (especially when there are very long posts with a gazillion images such as yefJ tends to post) and so sometimes they are hard to find again (I have reported this a while back - the workaround is to take the URL of the thread and remove the trailing part (the bit after yparam-expression/ in the URL) and then you can re-access everything). Andrew.
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Forum Post: RE: SKILL command to read category files from disc
Add a call: ddCatRefresh(catID) on the line after ddCatFindCat. That will cause it to refresh from disk if needed, and will solve your problem. Regards, Andrew.
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Forum Post: RE: SKILL command to read category files from disc
I thought I had looked at the documentation but apparently not close enough. Sorry for not paying closer attention. Thanks for the help!!
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Forum Post: RE: Evaluate Expression that depends on another expression after ADE XL Run
That makes sense. Explains why I couldn't use it. Thanks, Andrew.
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Forum Post: RE: How to get the correct hierachy path by using API geGetAllProbe()
Thank you Andrew! This is exactly what I want, problem solved!
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Forum Post: RE: How to generate input.scs from maestro view by SKILL backgroud?
Hi Andrew The reason why I can't just run the EMIR simulations from the maeRunSimulation() calls is that there are two EDA tools refered, NOT all in virtuoso Current EMIR flow: 1. Export input.scs from a maestro bench(virtuoso platform, using only one corner, mostly FF for worst case) 2. Import the input.scs to relstudio(ansys platform) for EMIR analyse They are step-by-step proceed in GUI mode which makes low efficient, so I try to do this in bash skill
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Forum Post: Multi-Section Component with netlist errors
I have a dual LED part (Avago HSMF-C16x) [ https://docs.broadcom.com/docs/AV02-0584EN] with one LED being pin 1 Anode and Pin 3 Cathode, the other LED is pin 2 Anode and Pin 3 Cathode. I created a 2 section part the first part symbol is an LED with pin 1 anode and pin 3 cathode. The second section is pin 2 anode and pin 4 cathode. Downloaded the first footprint from SamacSys I use these settings for my netlist. and I get this error... and this is the session output... ------ Oversights/Warnings/Errors ------ #1 ERROR(SPMHNI-191): Device/Symbol check error detected. ERROR(SPMHNI-195): Symbol 'HSMF-C163' for device 'HSMF-C163_HSMF-C163_HSMF-C163' is missing pin '1'. ERROR(SPMHNI-195): Symbol 'HSMF-C163' for device 'HSMF-C163_HSMF-C163_HSMF-C163' is missing pin '3'. ERROR(SPMHNI-195): Symbol 'HSMF-C163' for device 'HSMF-C163_HSMF-C163_HSMF-C163' is missing pin '2'. ERROR(SPMHNI-195): Symbol 'HSMF-C163' for device 'HSMF-C163_HSMF-C163_HSMF-C163' is missing pin '4'. #2 ERROR(SPMHNI-191): Device/Symbol check error detected. ERROR(SPMHNI-195): Symbol 'HSMF-C163' for device 'HSMF-C169_HSMF-C163_HSMF-C169' is missing pin '1'. ERROR(SPMHNI-195): Symbol 'HSMF-C163' for device 'HSMF-C169_HSMF-C163_HSMF-C169' is missing pin '3'. ERROR(SPMHNI-195): Symbol 'HSMF-C163' for device 'HSMF-C169_HSMF-C163_HSMF-C169' is missing pin '2'. ERROR(SPMHNI-195): Symbol 'HSMF-C163' for device 'HSMF-C169_HSMF-C163_HSMF-C169' is missing pin '4'. Here is section 1 of my symbol and here is section 2 I have tried 2 different footprints and get same results, here is the currently set footprint showing what pin 1 is set to... i run the mouse over 2, 3 and 4 and they all verify to be the correct pin numbers. Any help anybody can provide would be appreciated.
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Forum Post: RE: how to pass array of parameters through CDF down to a verilogA code?
hi Andrew, I am facing the same issue: "ERROR (SFE-874): "input.scs" 1087: Unexpected block statement "{"." Has this issue been resolved yet? Can Spectre now handle VerilogA arrays such as {1,2,3,4}. Thank you.
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Forum Post: RE: Ratsnest when moving parts - disappears
Hi, FYI. From a few months ago. https://community.cadence.com/cadence_technology_forums/f/pcb-design/40646/ratsnest-display-does-not-work-right-if-slide-etch-is-enabled-during-a-move-or-drag-operation-allegro-17-2-s047---allegro-16-5 Honestly that needs to get fixed IMHO.
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Forum Post: RE: Multi-Section Component with netlist errors
Hi can you attach your Symbol and footprint in a zip file to the post ?, When I click on your pictures they link to download a data sheet, the pictures don't open so it is hard to see whats going on.
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Forum Post: RE: how to pass array of parameters through CDF down to a verilogA code?
Not sure when this was fixed, but a parameter such as in the example above now (in IC618 ISR3 - may have been this way for some time though) gets changed in the CDF to [0,0,1,0] (square brackets rather than curly brackets). This then works correctly because the netlist would contain the spectre vector syntax. In earlier versions before this was done automatically, you can use Tools->CDF->Edit CDF, set the type to "Base" and pick the cell for which you have your VerilogA view. Change the vector parameter to have square brackets. Then when instantiating the design in a schematic, on the create instance or edit properties form set the value with square brackets if you want something other than the default. Regards, Andrew.
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Forum Post: RE: Direct Plot then Transient Signal stop updating after some time
It's the bit at the bottom of the Outputs->Save All form (sorry, I said the wrong menu). Andrew
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Forum Post: RE: hiCreateReportField... passing arguments to its callback
Hi, I am trying to re-do this code so I can create a Tab which has a function of adding and entry of information in the table. Is it possible in here skill? Its just like displaying information in every the selected entry For example there exists this table like the table shown above. list( "LMARK" "metal1" "drawing" "high" 1.0 2.0) list("george" "metal2" "drawing" "low" 3.0 1.0) list("harry" "metal3" "drawing" "low" -3.0 5.0) I would like to add an entry in the list. When I select another layer the data will be added to the list. See image below. list( "met1" "metal1" "drawing" "high" 1.0 2.0) list( "LMARK" "metal1" "drawing" "high" 1.0 2.0) list("george" "metal2" "drawing" "low" 3.0 1.0) list("harry" "metal3" "drawing" "low" -3.0 5.0) *WARNING* hiDeleteField: field tabInfo3 is not in scroll region page1 *WARNING* hiAddField: Cannot add non-unique field symbol to fieldList - tabInfo3 I try to use the logic of after using the addField I will use the DeleteField to erase the old field but then I got some warning like the * above. Thanks for the help. -GP14
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Forum Post: Is there a way to adapt vRfine file after RTL source file updated and line number changed
Hi, In case of we have a vRefine file(eg: expression exclusion), and then RTL source file is modified which result in line number changing, when we apply vRfine file in IMC, the exlusion can not be applied correctly because previous code line changed. Does anyone know is there a way we can use to adapt vRfine file conveniently to avoid manual modification of vRfine file? Thanks
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Forum Post: RE: Toggle schematic grid between "dotted" and None using bindkey
Hi Lawrance, Agree with your example, but I would like to do the same with Dynamic Net-Highlighting and connect by Name highlighting to have the arcs drawn between islands of connectivity and do not success. Can you help me ? Regards Eric
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Forum Post: How to use pss-pnoise output noise spectrum in pll excess phase model
Hello I ran PSS+Pnoise on LC VCO. Now i have output noise profile in sqr(v)/Hz vs offset frequency. Now i want to use this spectrum in PLL excess phase model(created in virtuoso) to check how PLL will filter this noise. Please can you help me how to do this. Because i am not getting any source in virtuoso which can read spectrum csv file. With Regards Munish
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Forum Post: RE: Is there a way to adapt vRfine file after RTL source file updated and line number changed
Hi. Yes, you need to enable refinement resilience in the coverage control file using the command set_refinement_resilience. Please look at the documentation on support.cadence.com for full details.
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Forum Post: RE: Multi-Section Component with netlist errors
community.cadence.com/.../Multi_2D00_section-pics.zip Her you go. Need anything else to be able to help me let me know...
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Forum Post: RE: Toggle schematic grid between "dotted" and None using bindkey
Eric, You are replying to a 4 year old thread with a question that does not seem to be related, which is against the guidelines for posting to this forum ( Guidelines for the Custom IC SKILL Forum ). Can you please start a new thread/topic and pose your question clearly; I'm not sure I even understand what you are asking for here? Please provide as much detail as possible so that someone not sat at your desk would understand what you are looking to achieve. Best regards, Lawrence.
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