Anyone else run into this and have a solution? I have an orcad sch on a google filestream drive, and trying to create netlist and update board file: (note the output directory also on google filestream) I get: Digging in the logfile, there are two places where files fail to write: Performing a partial design check before saving. Failed to open file 'G:/MY DRIVE/10-REV001/allegro/#Taaaaac30420.tmp'. netrev run on May 17 10:34:12 2019 DESIGN NAME : 'REV001' PACKAGING ON Feb 15 2016 19:53:59 2 errors detected No oversight detected No warning detected cpu time 0:32:06 elapsed time 0:00:19 File save problem: The requested operation cannot be performed on a file with a user-mapped section open. --- and then later ---- ------ Oversights/Warnings/Errors ------ #1 ERROR(SPMHNI-235): Error detected saving design. ERROR(SPMHNI-234): Cannot write drawing, 'G:/MY DRIVE/10-REV001/allegro/REV001.brd' out to the directory: 'Error while saving the drawing.'. #2 Run stopped because errors were detected When I copy the whole thing to a directory in my 'Documents' directory (on C: as usual) then the whole thing works with no errors. So my two theories are that 1) non-NTFS file system somehow screws it up 2) non C: directory somehow screws it up 3) what's really going on (of which I have no idea!) The right answer is probably 3 ;)
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Forum Post: ERROR(ORCAP-32007): Netrev failed -- only when design is on Google File Stream drive
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Forum Post: RE: Cannot add dummy net on No Connection pin
What I do (16.6) is add a short net to a pin in the schematic. Then in the constraint manager I create a dummy CSet and create net properties such as spacing. Once the CSet is created i assign the short net to the Cset. I do this alot for electric spacing on pins attached to packages that are design as a non bonded (internally) pins that are designed such to meet electrical clearances between to high voltage pins. This way I don't have to wave DRC's (I don't like any DRC's even waved ones).
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Forum Post: RE: Cannot add dummy net on No Connection pin
That's actually the best way IMHO to do it -- as you point out you can class these nets appropriately.
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Forum Post: RE: ERROR(ORCAP-32007): Netrev failed -- only when design is on Google File Stream drive
You don't mention anything about which version of the tools you are using but, I would say, the first thing to do is change the mapping point for the drive to remove the space from the folder name, as in, G:\My Drive isn't going to work but G:\My_Drive (for example) likely would. This has certainly been an issue in older versions of the tools. I don't think that 1) and 2) are likely to be factors if Windows can read / write the target location for the files.
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Forum Post: skill script return wrong value for floating-point data, failed at if condition statement
version IC 6.1.7-64b.500.23 I had a skill script created some time ago and it works, but starting with this version above, i find the ade-xl windows doesn't show the value any more. After some debugging, I find the root cause is floating-point value. %g doesn't show the floating point value anymore, but something like an address is returend. When I try to compare the address with 0 in the if statement, the if statement will give me an error. Below is the test script defined. The line of printf will shows the returned value if proper x waveforms are given, I expect to have a floating point number returned as the average of the waveform, however, an address of "avg_x=srrWave:0x3bb0a780" was returned to the CIW windows. Un-comment the three lines I mentioned will results in an error for the if statement. " expression evaluation failed: val is not legal. expression evaluation failed: MYrms(IT("/R10/PLUS") ) ("greaterp" 0 t nil ("*Error* greaterp: can't handle (srrWave:0x3bb0a7a0 > 0)")) " skill script is defined below procedure(MYrms(x) poport=stdout printf("enter procedure\n") printf("avg_x=%g \n",average(x)) ;;un-comment the below three lines to re-run and have the error ; if((average(x) > 0) then ; printf("%g \n",average(x)) ; ) rms(x - average(x)) )
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Forum Post: RE: skill script return wrong value for floating-point data, failed at if condition statement
Case Number: Case 46360242
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Forum Post: RE: ERROR(ORCAP-32007): Netrev failed -- only when design is on Google File Stream drive
I agree with oldmouldy: space in folder or file names have to be avoided. Such as @ , é, &, µ and so on...
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Forum Post: Evaluate an expression once per Corner - ADE Explorer
I'm trying to measure the output resistance of my analog block. I vary the output bias voltage a small amount and record the current for each value of the bias. I then calculate the output resistance as the inverse of the resulting current-voltage plot. I would like to then vary the length of the transistors in my block and for each length, find the output resistance. So I currently have a corner set up that varies the length and bias voltage. However, the expression for calculating the output resistance attempts to evaluate at every point in the corner when I really need to evaluate over sections of constant length in the corner. I can evaluate my expression using the EvalType=Sweep for a single length and this works correctly. However, if I include multiple corners, each with a different length, then the EvalType=Sweep attempts to evaluate the output resistance over all lengths, which is not correct at all. So I'm wondering if it's possible to do this in the ADE Explorer Maestro view?
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Forum Post: RE: I need to know about the traces with details!!!
Here is a good free website tool to help you to calculate trace widths. Its called PCB Tool Kit. Go to saturnpcb.com to download.
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Forum Post: RE: Validate idial inductor using Yparam expression
Hello Andrew, Thank you very much. A very good method.
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Forum Post: RE: skill script return wrong value for floating-point data, failed at if condition statement
Since you've created this as a case, I won't duplicate effort and answer it here, other than to say that it would appear that the input waveform is a family rather than a single waveform, and your function has not been designed to cope with that. I'll leave it to my colleagues in customer support to follow up with you. Andrew.
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Forum Post: RE: Phase Noise Analysis on a Gated Ring Oscillator
Dear bvanbockel, Is there a reason you cannot operate the ring VCO in its enabled state and use that data? I am trying to think of a mechanism where the phase noise will be different on a transient basis from its steady-state value and nothing is coming to mind. There will, of course, be some frequency drift relative to its steady-state frequency, but I don't think that will effect phase noise at any relevant offset frequencies. There will also be a start-up and power-down transient. However, that neither of those appears to impact phase noise as the phase noise is only defined about some carrier frequency and not a frequency "chirp". Perhaps it might help me understand (anyway) why you believe a pss simulation of the gated VCO is necessary in its gated mode of operation. In other words, what exactly are you trying to quantify about your TDC? Sorry I can not think of any better response! Shawn
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Forum Post: RE: skill script return wrong value for floating-point data, failed at if condition statement
Thanks for your reply, Andrew. The part that I don't understand is that this script works OK previously, but suddently, it shows like that. Does that mean skill interpreter has changed? Or the way how I code it previously was wrong?
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Forum Post: RE: Multi-Section Component with netlist errors
Hi, I meant the actual pcb footprint and the orcad symbol , .olb not the pictures :) , If you can attach as a zip file I will check them for you and see if they package correctly. Thanks
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Forum Post: RE: Multi-Section Component with netlist errors
Oh sorry.... Here it is.. . community.cadence.com/.../HSMF_2D00_C162.zip
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Forum Post: RE: ERROR(ORCAP-32007): Netrev failed -- only when design is on Google File Stream drive
Sorry for not mentioning, version 16.6. And, I have shortened the names to protect my client, but there were spaces in the file names in both the drive stream and non-drive stream version. So that's not it, I thought the same thing at first. Also, windows 10, totally updated, english version, no language packs. No strange characters in the path names. I should also mention, for those who don't know, that when you copy a file from NTFS to DriveStream you'll often (and in the case of the .brd file) get a warning that 'properties of the file won't be copied'. Could be part of the issue?
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Forum Post: RE: Multi-Section Component with netlist errors
No problem at all. Ok so here is what was wrong. The footprint looked ok, pinning looked fine. The issue was with your symbols and what you were trying to achieve. Basically you have a footprint that contains two led's but in order to map your schematic symbols to that footprint you have to create a symbol that is of type "Hetrogeneous" This type of symbol contains two or more sections, typically A & B etc. What you were trying to do was use two individual diodes and package them to that footprint which wont work. I created a complete project for you. See attached in the next post. I renamed the diode to HSMF-LED for both schematic and the footprint. Just extract the files to a folder on your drive. I used c:\check here as a place to store them. Here are a few screen shots to show the main screens. Creating a new symbol that contains multiple symbols in one package. Symbol Sections: Part A Part B Schematic with notes: Netlist creation - Notice the paths ! "Makes things easier to find on your drive" See next post for project files..
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Forum Post: RE: Multi-Section Component with netlist errors
Here is the project, Hopefully it will help you out and show you some good steps. Everything is included. Library, Pcb, Schematic community.cadence.com/.../check.zip All the best..
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Forum Post: problem creating symbol of netlist subcircuit
Hello ,i am trying to import a spice subcircuit as symbol in schematics. Hspice text cellview was created where i entered my MOS subcircuit checked the syntax. (txt file of the model attached) After that i am trying to create a simbol by create->celview From cellview. created a symbol as done a test bench as shown bellow. However i get an error massage as shown in the attached log.Where did i go wrong importing my sub circuit as a symbol into schematics? Thanks community.cadence.com/.../spice.txt ******************************************** community.cadence.com/.../1300.log.txt
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Forum Post: Simulation crashed - Killed by user
This simulation suddenly crashed and there was a line saying that "Killed by user". I didn't kill it myself. Does this mean that someone actively killed it?
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