Forum Post: Innovus placement related command issue
Dear all, I am recently using innovus implementing the placement stage. And here is some related commands: 1. global placement: setPlaceMode -place_design_refine_place false place_design 2....
View ArticleForum Post: unload skill code in CIW
hi , i have load("test.il"), and how can i unload or remove this from CIW ? It seems there is no unload command for this.
View ArticleForum Post: RE: ERROR IMPCCOPT-4082 when running ccopt_design command in...
Hello, For me there was a problem in the SDC file generated by Genus. There was no "create_clock" command in the sdc file due to some script error. Maybe check your sdc file.
View ArticleForum Post: Maestro - save right click menu order from results tab
Is there a way to save right click menu order from results tab after customizing it? This will avoid re-customizing menus in newer workspaces? virtuoso version ICADVM20.1-64b.500.34
View ArticleForum Post: RE: unload skill code in CIW
Hi, When you load SKILL code, everything is interpreted and the associated objects are generated and assigned to variables. Unfortunately, there is no safe way to unload a file (except restarting...
View ArticleForum Post: RE: mirror boundary condition
thx for you're answer but I dont understand. So since the flow of the 360 degree is axisymmetric, I thought I will use something like a symmetry Plane at 180 degree and declare this symmetry plane as...
View ArticleForum Post: RE: verification metrics on IMC
Does calculating the average provide a more accurate representation of coverage or is it just a matter of personal preference?
View ArticleForum Post: RE: modify bump and export the modified bump
Hello zpofrp , at the symbol instance level, a pin is "exploded" when a change is made to its physical definition that differentiates it from its description in the parent symbol definition. It could...
View ArticleForum Post: RE: VSR not dropping vias to short all pins
The model you describe should work. What does the form 'Connectivity -> Pins -> Pin Connectivity Setting' show?
View ArticleForum Post: RE: Input in 32 bit full adder
It is virtuouso, spectre and version is 6.1.8-64b
View ArticleForum Post: RE: Maestro - save right click menu order from results tab
No, but you can move the .cadence/RMBCustomization directory (where the changes get saved to) to another .cadence directory (for example the ~/.cadence directory) - in which case it would get picked...
View ArticleForum Post: RE: Fanout missing in OrcadX Presto
Hello Malokani , please have a look at the below post in the forums which shares the steps to create fanout in OrCADX Presto:...
View ArticleForum Post: RE: unload skill code in CIW
For the sake of it, I made a script to load a SKILL file in a sub-shell and return the list of global changes it makes. This is still unsafe : For example, If the script you load is calling rm...
View ArticleForum Post: RE: ERROR IMPCCOPT-4082 when running ccopt_design command in...
Yeah it was something similar with the sdc generated from genus in my case too. Thanks a lot for your reply!!
View ArticleForum Post: probe internal bus voltages
Hi, I would like to probe 4sets of 8bit buses internal to a block (internal ADC outputs) from test bench level. At the test bench level, i will then be applying these bus voltages/signals to a...
View ArticleForum Post: RE: probe internal bus voltages
The deepprobe component doesn't (currently) support buses. There's an enhancement change request, CCR #1676745 which is requesting this - I see there's a proposed fix, but I don't know yet how this is...
View ArticleForum Post: ViVA - eye diagram entries are not allowing variable names
Eye diagram entries start, stop, & interval are not allowing variable name like VAR("stoptime"). Am I missing something here? Or it's not possible at all? virtuoso version ICADVM20.1-64b.500.34
View ArticleForum Post: RE: What is spaced/staggered multi drill on a single pad
Hi RhitRohan Can you be a bit more specific? Are you asking about staggered vias?
View ArticleForum Post: Return Path and its importance in PCB Design!!
What is Return Path? A return path in PCB design refers to the electrical path that current takes to complete a circuit back to its source. It’s essential for maintaining signal integrity and overall...
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