Forum Post: Incorrect netlist of a circuit containing multibit instances from...
It happens that simulations cannot start because of errors found by spectre in 'multibit_pcell' during hierarchy flattening. The typical error message reads: ERROR (SFE-1997): "input.scs" line#:...
View ArticleForum Post: setup RAVEL Rules in CM error
hi can anyone help with this. im trying to run Ravel Rules in different boards, theres one board that has error . how can I solve it ?? here is the error in command window : E- *Error* getDirFiles:...
View ArticleForum Post: The checks/Asserts in the ADE XL
Dear Andrew, I use the checks/asserts function in the ade xl to do the static HighZ Node Chenk, if I choose the Spectre in the simulaiton performance mode the violations in the results are 0, if I...
View ArticleForum Post: RE: setup RAVEL Rules in CM error
I have no experience with RAVEL, but 'getDirFiles(".")' gives this error when the design is located in the root of a drive, eg c:\. Can you try to move the designfile to a sub-folder location?
View ArticleForum Post: RE: Viewing Classes in Simvision
Add '-dynamic' to your 'probe' command. I typically have 'probe -create -all -depth all -dynamic'. Side node: I don't know what '$shm_probe' does, but it seems like it's connected to probing. You can...
View ArticleForum Post: XPS ms for help
hello everyone When I simulated PLL, aps simulation could converge, but when I put ++aps on the hook, vco did not vibrate. Meanwhile, if XPS ms is used, the following error occurs: Internal error found...
View ArticleForum Post: RE: Create couple of layer combo box
how to Print ROUND shape metal in cadence using skill program.
View ArticleForum Post: Configure VHDL design for simulation using VHDL Tool Box
Hello, In my simple setup I proceeded as follows: Created cell block_A (clock stimuli) Created symbol view for block_A In Symbol Editor ... "Create CellView from CellView", then select VHDL ......
View ArticleForum Post: RE: Configure VHDL design for simulation using VHDL Tool Box
Well ... the problem is resolved: there was a syntax error in block_B architecture. Before closing this topic can someone confirm ... or refute the following contents of config view for block_C : Cell...
View ArticleForum Post: Setup text editor for Library Manager
Hello, How to setup "normal" text editor (e.g. gedit or emacs) for Library Manager. Thanks.
View ArticleForum Post: Error while trying to simulate simple VHDL testbench using ams...
Hello, The setup is the same as described in my previous topic: block_A - VHDL stimule block_B - some VHDL combinatorial logic block_C - schematic where block_A and block_B are connected When I run...
View ArticleForum Post: AMS simulation with digital simulator on top
Normally we use the AMS flow starting from virtuoso. I my current project I would like to use the digital environment (IUS) to do AMS sims. This way I can reuse the complete SOC environment to run the...
View ArticleForum Post: RE: help - skill code for goto xy coordinate
HI Satya/Andrew, The Above code is only for the single coordinate with scaling factor like (2.0 5.0 2) . I want improve the code like it should be take multiple coordinates at single time and mark the...
View ArticleForum Post: RE: Create couple of layer combo box
[quote userid="435524" url="~/cadence_technology_forums/f/custom-ic-skill/41875/create-couple-of-layer-combo-box/1361605#1361605"]how to Print ROUND shape metal in cadence using skill program.[/quote]...
View ArticleForum Post: Intercept custom skill function before execution
Hi, We have a custom skill script which can be called either through a menu or a keyboard shortcut inside the virtuoso schematic editor. This skill function reads a cadence variable which is set in our...
View ArticleForum Post: RE: Export physical error
Hi Mike, Iam also getting the same error while iam using the CM. But i didn't understand where i can find the file and need to modify in that. Could you please elaborate once again the below. " Add the...
View ArticleForum Post: RE: Setup text editor for Library Manager
What does that mean? I don't understand the question... Andrew.
View ArticleForum Post: RE: The checks/Asserts in the ADE XL
From "spectre -h static_highz": *********************** Static HighZ Node Check *********************** Reports the nodes that do not have any possible conducting path to a DC power supply or ground....
View ArticleForum Post: RE: Incorrect netlist of a circuit containing multibit instances...
You need to contact customer support. I think you tried to do that via email (from a search I did with an identical error line), but the auto-reply tells you to log the case through support.cadence.com...
View ArticleForum Post: RE: Setup text editor for Library Manager
When clicking on vhdl , verilog cellviews, some elaborated editor opens (like gedit or emacs), but not default virtuoso editor. Possible ?
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