What is the content of /etc/os-release ? My guess is that you are running an OS that only supports 64-bit executables. So perhaps try running "xrun -64 -version" and see if that works. If it does, you could use: setenv CDS_AUTO_64BIT ALL or export CDS_AUTO_64BIT=ALL (depending on your shell) and then: xrun -version should work. Andrew
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Forum Post: RE: [AMS][xrun: Command not found]
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Forum Post: RE: line to line spacing constraint / drc not working properly
Thanks, That was the issue.
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Forum Post: RE: Tooling holes versus Fiducials - Do I need both?
Tooling holes may be required by the fabricator. Fiducials should always be used. Use a solid copper pad relieved of solder mask and covered with solder paste. This will help the pick-n-place machine find the fiducials. Do not use tooling or any other holes as fiducials.
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Forum Post: RE: Tooling holes versus Fiducials - Do I need both?
Fiducials are hard to lose if you start them as components from the schematic. Old cad tools like P*DS blow them away if they aren't in the netlist. A fatal error for older Fuji SMT machines was not having a minimum three fiducials on the board, per side, 1mm circle pad with 1mm clearance. I think we only need tooling holes if the board will be tested on an ICT fixture. Tooling holes just for bare-board fabrication are ideally located on far corners of the 12x18" fab panel(fabrication rails). Often, there isn't a benefit to putting them inside the board. Fiducials for Paste stencil alignment are ideally located on the assembly panel rails, outside of the boards, and should be as far apart as possible to improve stencil alignment accuracy. Same approach as tooling holes for secondary drill/route passes. Fiducials for pick-n-place. Years ago, we built fiducials into the corners of a BGA footprint. Fortunately, that's no longer needed. Placement accuracy improves when fine-pitch parts are close to a fiducial target as the SMT machines compensate for any warp or thermal expansion after reading the fiducials. On the other hand, if you add one too many fiducials, SMT operators can skip them in the program if they can't justify the time. Rigid-flex boards shrink/expand with humidity like crazy. So, it depends.
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Forum Post: RE: Tooling holes versus Fiducials - Do I need both?
Hi Ulf K, I think the idea to have in the schematic is just fine. In that case these will come with reference designators and the norm would be to designate these as FD1, FD2... and so on. From my experience, fiducials were more typically implemented as symbols placed directly in the brd design, not sourced from the bom. The key is that the symbol name should clearly contain the word "fiducial" or "fiducial_variantname". Most production systems will search for this as a keyword in the data and will then propose these for use by the program.
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Forum Post: RE: line to line spacing constraint / drc not working properly
Ok great! Good luck with the design.
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Forum Post: How to check stability of mm-wave multistage power amplifier?
Hi, I'm working a 60GHz multi-stage PA project and have some problem of checking its stability. From my point of view, the K-factor method (Rollet-Criterion) doesn't work for multi-stage design. For transient analysis, it has problem dealing with the snp files that respresents the transmission-lines and transformers from my EMX simulation. I have read manythe suggestions (e.g. 7 habits of successful S-parameters) of how to set nport. However, even I set my EMX from 0 to 300GHz (to cover 5th harmonic of 60GHz) with 100MHz step, the transient simulation cannot converge and exhibits oscillation over 100 times of my VDD, which to me is impossible to be true. I can try to further extend the EMX frequency but I don't think it is accurate above 300GHz. For the pz analysis, I believe it cannot work with frequency-dependent component like nport (snp). The HBSTB anlysis seems to be the most proper solution. I can successfully run it and get some useful results. For the simulated gain/phase margin, I'm not sure whether it can tell the stability as now the loop gain is a BPF function instead of low pass in the op-amp case. I followed the video in the cadence forum on how to create a Nyquist plot from the stb analysis. However, I disagree with the conclusion in the video claiming that stability can be told only by the encirclements of (-1,0). For Nyquist stability checking, we also need the information about poles of the loop gain. Therefore, I wonder whether HBSTB analysis can provide this loop gain poles information or is there any other (better) way to determine the stability in my case. Besides, if there is anything wrong about my understanding to all these different analysis, please feel free to point it out. Thanks.
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Forum Post: RE: CAPTURE PDF NET NAMES are not aligned how can i align it?
I already solved that problem if user export schematic to PDF, you have to changing page size then can solved above problem
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Forum Post: RE: [AMS][xrun: Command not found]
hi Andrew, that it is! now it works by referring to the "xrun" under folder "64bit". I'm the first one working in AMS flow in our group so have got a ways to go in understanding Xcelium. anyway thanks.
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Forum Post: Virtuoso AMS Simulation Error
Greetings, I ran into this error " *Error* eval: unbound variable - _GLOBAL_amsEMSHandle " while trying to run a simple AMS sim in virtuoso. Does anyone have an idea what caused this issue? My virtuoso version is ICADVM181, with INCISIVE152. Thanks in advance. Siyun
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Forum Post: RE: Residuals
Hi, For the Turbo solver and the Open density-based solver the residuals are normalized by the residual in the first iteration. This may explain why it is not always possible to decrease the same orders of magnitude. It can be understood by taking the extreme case of a simulation where the initial solution is already very close to the final converged solution. In that case the residuals in the first iteration will already be very small and it may not be possible to decrease even more than 1 order of magnitude. Still it can be a well converged solution. I also recommend to look at the residuals of the other equations (momentum and energy conservation) and to look at physical quantities at various relevant probe locations. It may happen that the density does not vary much and you don't get below -4 for mass conservation, but you may still see an evolution for other residuals or physical quantities at probe locations. For more detail on the definition of the residuals see also the section "Monitor simulation" in the Fidelity 2023.2 documentation. Look under "Customize the input data >> Residuals. I hope this helps. If a question is remaining, it could be helpful if you show a few plots of the various residuals and probe evolutions (with their location). Best regards, Colinda
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Forum Post: [liberate] FAILED TO GET MOS MODEL FOR 'XMP32_0'!
I am trying to characterize a standard cell library, but liberate gives me the following errors. The point is that some of the standard cells can pass while the other such as MUX4D8 can not. As shown in the blow, MUX4D8 can pass the timing test ( can be checked in the deck ), when it comes to power, error occurred. The model they used is the same (same type NMOS and PMOS) and been set in the char.tcl. Do you have any suggestions for this problem? Thank you in advance!
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Forum Post: RE: Virtuoso AMS Simulation Error
Siyun, Please see *Error* eval: unbound variable - _GLOBAL_amsEMSHandle netlist error in AMS Designer Also, why are you using INCISIVE152 - it's an obsolete 9 year old release, which was replaced by the XCELIUM stream (with many versions since, as it has a 6-monthly release cycle). ICADVM18.1 is also old (the last version was in 2020) - essentially the article I point to suggests using a version later than ICADVM20.1 ISR22. The problem occurs if you have a second maestro session open in the same Virtuoso with spectre as the simulator. I think that if you close that second maestro view then it will be OK (probably - this happened some considerable time ago so I don't have the time to test). Andrew
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Forum Post: Display Your Know How: Placement
Which placement option is best, image A or B? Simply answer by letter or else include any reason to support your answer. All opinions are welcome.
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Forum Post: RE: [liberate] FAILED TO GET MOS MODEL FOR 'XMP32_0'!
Hi Sherryshe, Which Libeate version are you using? Do you have -extsim spectre in char_library command? Is the line for instance XMPM32_0 complete and correct in syntax? Did you run the saved deck for the failed arc? Please use extsim_flatten_netlist=0, ski_enable=0, extsim_save_passed/failed=deck for this debug. Regards, Guangjun
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Forum Post: How to decrease the capacitance of charging and discharging at the MSB of current steering DAC
Dear Sir I'm designin a 3 bit binary differential current steering DAC using transmission gate as a switch in the top and the bottom of my circuit. When the transition at MSB is occured, the time of charging and discharging the capacitance is increased which make the transition more slow, as can be seen in figure below: when the binary switch from '001' to '110', the rised slope and decreased slope are not identical. It is necessary that the descent slope and the rise slope should be equal. This provide an asymmetry of the curve and i can’t reconstrut my input signal which is a sinusoidal signal. Moreover, each transition where all the bits change, the rised slope and the decreased slope i are not equal. Also, i try to switch from "010" to "011", i have the same results. during the descent or rise of the signal, there is a change in the slope, the variation is more slower; as presented in this figure : the best case dy1 and dy2 should be equal because thay have the absolute value of slope and this is not the case. How can i decrease the capacitance of charging and discharging at the MSB of current steering DAC nad make the transition at MSB more faster. I'm so gratefull if you can help me
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Forum Post: Display the hierarchical block name on underlying schematic page
There is an additional feature to display the hierarchical block name on the schematic page in OrCAD Capture CIS. Follow these steps to explore this feature: Open the top-level design and descend on H-Block by right-clicking on the block and selecting Descend Hierarchy . It will take you to the underlying schematic page. Double-click on the title block to open its properties. The Edit Properties dialog box appears. Here, you must add a new property named BLOCK_NAME to the title block and enter its value. Ensure that the property is marked as displayed. The display of the property can be controlled by clicking on the Display button after adding the property. 4. The property appears on the TITLE BLOCK of the schematic page. You can adjust the position of the property on the schematic page for better readability. 5. Now, if you descend on BLOCK1 and BLOCK2 , the H-Block name can be seen on the schematic page. Hope you find this feature interesting to use. Regards, Yugandhar.
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Forum Post: How to get a symbol from sch and paste it into a specified OLB library file with tcl script?
I am collecting symbols from sch to enlarge my olb file. It is not a efficient way that I copy a symbol from design cache and paste it into olb file. I want to use tcl script to do that. How to get a symbol from sch and paste it into a specified OLB library file with tcl script?
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Forum Post: Wire error
I can no longer connect the parts with the "wire" function. When I am on the first terminal, the red dot that allows the correct connection is not present, however on the second terminal it appears and so I am unable to make the connections correctly. Also the "net alias" doesn't automatically put itself on the wire when I get close to it. Can anyone tell me if I changed any settings by mistake or if I can fix it somehow?
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Forum Post: Passing model file as parameter
Hello, I am new to oceanscript. I want to change the model variables in the .scs modelfile for simulations. Right now, I am doing it by manually changing the parameters in the modelfile. I am trying to create an oceanscript where I can run a loop that will simulate one model file at a time from a list of model file and run through all the model files in that folder. Can anyone suggest what will be the best way to achieve this?
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