The "cds_srr" interface is supported from the SPECTRE stream (historically the MMSIM stream). You can find info on it by running /bin/cdnshelp and then searching for "matlab". There is a support matrix but doesn't look as if anyone has maintained it for some time... anyway, I regularly use Matlab 2018a and 2018b and they should work OK. However, if using ADE Explorer and Assembler, there's a newer, tighter integration. This is shown in these two videos: Using the Enhancement Virtuoso ADE Product Suite and MATLAB Integration: A Practical Guide (a recent-ish joint video with the MathWorks) Making the most of using MathWorks MATLAB and Virtuoso ADE Product Suite together (a shorter introductory video from 2017) Both have a mixture of presentations demos (and both have me talking... so apologies in advance) There's a Rapid Adoption Kit (under Resources on the support site) for this too. This integration makes it much easier to use Matlab expressions in ADE, whereas the cds_srr interface is a lower level interface to the results reader (the new interface is built on top of cds_srr, but it provides lot of higher level functions for interfacing to ADE). Regards, Andrew.
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Forum Post: RE: Cadence Virtuoso/Design Framework Compatibility with MATLAB
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Forum Post: RE: Cadence Virtuoso/Design Framework Compatibility with MATLAB
Hello, Thank you for your response. By MMSIM stream, do you mean Spectre Virtuoso/Cadence version IC5.x or IC6.1.6 and previous ? By ADE Explorer and Assember, do you mean Spectre Virtuoso/Cadence version IC6.1.7 and above ? Or do you mean something else ? Thank you.
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Forum Post: RE: Migrating CIS from 16.5 to 17.2 -- 32-bit vs. 64 bit?
Whew! Thank you. I just upgraded CIS to 17.2 and got stuck. Your solution was perfect.
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Forum Post: RE: How to define a new standard via
Hi Max, there is my code: tf=techOpenTechFile(“techLibname” “tech.db” “a”) myVia=techCreateStdViaDef(tf “M2_M1a” “Met1” “Met2” list(“Via1” 0.19 0.19) list(1 1 ‘(0.22 0.22)) ‘(0.05 0.05) ‘(0.05 0.05) ‘(0.0 0.0) ‘(0.0 0.0) ‘(0.0 0.0) These codes are in a script and the CIW return “t” when I load the script.After more detailed check,I find that I can find the new via’s definition from the tech file that I dump from my tech library after I load the script. However,My orignial tech file still has no the via’s definition and I cannot still add the new via to my cell because I can not see the new via in “Create Via” form. Besides,let me tell you how I define a new via manually.I added a new via’s definition to my tech file’ s standardViaDefs section and then added the new via’s definition name to all the interconnect section and it works. Regards John
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Forum Post: RE: Cadence Virtuoso/Design Framework Compatibility with MATLAB
[quote userid="374799" url="~/cadence_technology_forums/f/mixed-signal-design/40926/cadence-virtuoso-design-framework-compatibility-with-matlab/1358456#1358456"][/quote] By MMSIM stream, do you mean Spectre Virtuoso/Cadence version IC5.x or IC6.1.6 and previous ? By ADE Explorer and Assember, do you mean Spectre Virtuoso/Cadence version IC6.1.7 and above ? By MMSIM, I mean the release that spectre is delivered within. This has not been part of the IC stream since 2004, and there were releases such as MMSIM60, MMSIM61 ... MMSIM151 (one a year roughly since 2004). In 2016 though, we renamed the release stream to be called SPECTRE161 and since then we've had SPECTRE171 and SPECTRE181. The cds_srr interface is shipped and supported via the MMSIM/SPECTRE installation (although it is actually present in the IC617 release and later, mainly for use by the new ADE integration). By ADE Explorer and Assembler, I'm talking about the new generation of ADE tools, as opposed to ADE L and ADE XL (and GXL). These were introduced in IC617, but ADE L and XL still exist in IC617 too - you have to consciously use the new tools (the storage is different). There is plenty of information on the Cadence public site and support site on adopting ADE Explorer and Assembler, including a rapid adoption kit (a workshop to show you how to migrate to the new tools). Regards, Andrew.
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Forum Post: RE: How to define a new standard via
Hi John, In addition to adding the stdVia def, you need to add it into the validVias interconnect constraint in the constraint group being used for Vias. That's what you've been doing manually, but if adding via SKILL you'd need to do it then too. The constraint group used is the one on Options->Editor for via. You can do it this way: cv=geGetEditCellView() cgName=cstGetDefaultConstraintGroupName(cv "Via") ; this should be what is on the Options->Editor cg=cstFindConstraintGroupIn(tf cgName) vv=cstFindFirstConstraint(cg "validVias") vv~>value=cons("M2_M1a" vv~>value) Regards, Andrew.
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Forum Post: RE: *ERROR* (DB-320001): Unable to get the Cadence(R) Design Framework II license feature of "111".
Hello Andrew, This is the return for "virtuoso -W". sub-version IC6.1.6-64b.500.4 Regards , Rena
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Forum Post: facing sync issue while generating the netlist
I am using Allegro design entry HDL 17.2. i updated in Schematic only a specific component without any changes in the existing board(.cpm file) .while generating a netlist i am facing Synchronization issue. If i am using the old board without any change also having the same issue.
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Forum Post: RE: expression problem from ac sweep
Hello Shawn and Andrew, thank you very much , i got a good varactor exactly as you described in you test bench methodics.
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Forum Post: Custom report generation
I am trying to create a custom report in Orcad PCB Editor that outputs the internal Part Number we have assigned. My schematic symbol has defined a property of "User Part Number". That creates Attached text: class = USER PART NUMBER subclass = ASSEMBLY_TOP value = 5041210 in the footprint. My question is what do I need to add to the symbol to get the part number to show up in the report using: # This is an extract command file # generated by the Extract UI. # COMPONENT REFDES REFDES_SORT SYM_CENTER_X SYM_CENTER_Y PART_NUMBER END
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Forum Post: Viewing task values in Simvision
Hello, I'm working on creating a robust simulation environment for a project and I'm not super familiar with Simvision/Incisive. In modelsim you can view the values inside task calls the same way you view signals in modules. Is there a way to do this in Simvision? I'm thinking maybe it has to do with the $shm_probe command. I'm doing $shm_probe(name, "ACM"). Is this possible with the Cadence tools? Thank you, Dylan
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Forum Post: RE: Viewing task values in Simvision
Hi Dylan. In general we recommend not embedding waveform probing in the SV code, as it's less flexible than using the Tcl interface. With Tcl, there is a "probe" command which allows you to specify the hierarchy to send to the waveform file, and at the same time you specify the types of design objects that are included, e.g. just i/o ports, internal nets, assertions etc. This can optionally include tasks and functions as well as memories. For example: "probe -create -shm top.dut -all -depth all -tasks -functions". Full documentation here: https://support.cadence.com/apex/techpubDocViewerPage?xmlName=tclcmdref.xml&title=Xcelium%20Simulator%20Tcl%20Command%20Reference%20--%20probe%20-%202.35.4%20probe%20Command%20Syntax&hash=probe-probecommand:syntaxprobeCommandSyntax&c_version=18.09&path=tclcmdref/tclcmdref18.09/probe.html#probe-probecommand:syntaxprobeCommandSyntax If you really want to stick with $shm_probe, add "T" to the mode string. See https://support.cadence.com/apex/techpubDocViewerPage?xmlName=svsim.xml&title=Debugging%20SystemVerilog%20--%20Accessing%20Design%20Objects%20with%20Tcl%20-%20Probing%20Compilation%20Units%20with%20Tcl%20and%20System%20Tasks&hash=AccessingDesignObjectswithTcl-1057261ProbingCompilationUnitswithTclandSystemTasks&c_version=18.09&path=svsim/svsim18.09/Accessing_Design_Objects_with_Tcl.html#AccessingDesignObjectswithTcl-1057261ProbingCompilationUnitswithTclandSystemTasks for all the options.
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Forum Post: RE: Viewing task values in Simvision
Hi Steve, Thanks for the very fast reply. That worked perfectly!
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Forum Post: Encryption of Capture tcl script
Hello, I need to encrypt a sensitive Capture tcl script. Page 106 of the Capture tcl/tk Application Note mentions the ''orcad::encrypt" command, however when I try to run from the Capture Command Window I get: [ 1]invalid command name "orcad::encrypt" I am using Capture 17.2-2016. Could you please advise ? Many thanks.
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Forum Post: RE: Viewing task values in Simvision
One more quick question. Can an automatic task's waveforms be shown? I have an automatic task but when I drag it into the signal window nothing shows up. If the task is static it works as expected.
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Forum Post: Improved ACE/AXI backdoor access
A new application note describes the improved backdoor access to the embedded memory in slave instances of ACE/AXI Verification IP (VIP). You will also find recommendations and how this functionality is supported before and after the backdoor access improvements.
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Forum Post: How to access Verification IP documents?
The easiest way to access Cadence Verification IP product documents is using the support site for VIP products. Starting the VIPCAT release 11.30.058, you can also download the document library. Go to download.cadence.com . Click the link, VIPCAT113. Select the doc package and download.
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Forum Post: RE: Viewing task values in Simvision
Hi Dylan, The simulator does not support probing of those. (It's a longstanding limitation.) For details, see the following Cadence Support article: https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1Od0000000siWaEAI Thanks. - Doug
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Forum Post: RE: Viewing task values in Simvision
Hi Doug, Thanks for the clarification. That shouldn't be a big deal. I don't use many automatic tasks.
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Forum Post: tran statement in spectre
I have used the below commands for tran statement for 1000 point tran1 tran stop=4e-8 strobeperiod=4e-11 tran1 tran start=0 stop=4e-8 strobeperiod=4e-11 but strange, in all print file i am able to view more than 1150 points. which is not required for my application. can i get a correct trans statement for 1000 points, can be considered the above range. Regards, Manjunath N
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