Forum Post: RE: Orcad library to concept symbol conversion
Hello, The command line parameters are not correct, there are no options (given by -). For example, the -proj option is not there to specify the project file. Command line parameters of cap2con are...
View ArticleForum Post: RE: X-out on assembly variants
Thank you eDave. I have one more question: How I can print dbid attributes ? I found in forum that I can use dbid->?? and it will return all the attributes, but when I try: printf(my_form...
View ArticleForum Post: RE: X-out on assembly variants
Instead of %s use %L. printf(my_form "some_value: %L", dbid->??)
View ArticleForum Post: RE: Orcad library to concept symbol conversion
It is working, Thank you very much.
View ArticleForum Post: RE: Transient DC voltage setup
Well, the pss and hb analyses are designed to examine the settled state, but they will probably not be much faster in this case, where the settling is pretty quick. They might also require an initial...
View ArticleForum Post: RE: X-out on assembly variants
No change, this is what I try to do: axlClearSelSet() axlSetFindFilter(?enabled '(components) ?onButtons '(components)) result=axlGetSelSet(axlSingleSelectName("COMPONENT" strcat("U10000")))...
View ArticleForum Post: RE: X-out on assembly variants
I have another question. this bBox creates rectangular area of whole component is it possible to use only one layer from component? For example PACKAGE GEOMETRY/DFA BOUND_(TOP,BOTTOM) The reason for...
View ArticleForum Post: RE: Changing the number of input bits in a DAC and problem in ADE...
Hi Andrew, Thanks for the solution. I am only a beginner to Cadence ecosystem and do not understand many terms used in the code that you shared. It would be of great help if you can tell the procedure...
View ArticleForum Post: RE: Rotation of routed boards
Thanks redwire that seems to be working great. I see that Allegro disconnects the net names to some of my traces...but that is easy enough to repair
View ArticleForum Post: RE: Changing the number of input bits in a DAC and problem in ADE...
Sorry for not making it clear. Here's the steps you need to take: Save the SKILL code above in a file somewhere (note I did just update it because I realised there was a discrepancy in the bus order...
View ArticleForum Post: NC-Verilog user manual
Hi, I am not able to trace the user manual of NC-Verilog. I need it, because I am trying to solve this issue:...
View ArticleForum Post: RE: NC-Verilog user manual
All Cadence's product manuals are available online at http://support.cadence.com/ . If you haven't already registered there, simply use your corporate email address to register. You might need your...
View ArticleForum Post: RE: Changing the number of input bits in a DAC and problem in ADE...
Thanks, Andrew. It worked!! For some of those who are reading the forum, another step. After adding the symbol to the schematic, to connect the bus, see the schematic snip given below.
View ArticleForum Post: RE: Help with exporting .ART with SKILL
Thanks so much, this is what i wasnt able to grasp about rexEx. I was trying to use rexCompile, rexExecute, rexMatchp. Totally overlooked rexMatchList.. Now, how can i run axlRunBatchDBProgram through...
View ArticleForum Post: RE: Help with exporting .ART with SKILL
I played around and found 1 option that finally worked for me films = axlGetParam("artwork")->groupMembers filmLayers = rexMatchList("^[0-9][0-9][0-9][0-9][0-9]-[0-9]_[A-Z][0-9][0-9]$", films)...
View ArticleForum Post: RE: Assura LVS for Standard Cell Library with only Abstract View
Hi Quek, cna you describe this a bit further? I have an issue in bicmos8xp. I want to run LVS on custom inductor layout as blackbox but M1 ground layer keeps causing similar issue by generating...
View ArticleForum Post: RE: Rotation of routed boards
Hmmm...that should not be happening. If you have routed your connections with "snap to connection point" turned on then rotations won't break that. If you are just touching an object such as a pin then...
View ArticleForum Post: RE: Rotation of routed boards
Yes...that is the only way I do it as well. There were a couple tracks that were connected on both ends...and a couple that were only not yet routed on both ends
View ArticleForum Post: RE: X-out on assembly variants
axlGetSelSet returns a list. Use result=car(axlGetSelSet(axlSingleSelectName("COMPONENT" strcat("U10000"))))
View Article