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Forum Post: RE: Capture CIS_Show Footprint

What exact version are you running from Help - About ? If it says 16.6 PXX then that's the base release and it may be an issue. Get the latest hotfix from Cadence Support / Channel Partner. You could...

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Forum Post: [AHB eVC]How to send transfers with no IDLE cycles

Hi, I want to send multiple SINGLE bursts with no intervals in between. like 2-2-2-2-2-2-2-2... However, when I use the following source code, I got a couple of IDLE cycles like 2-2-0-2-2-2-0-2-0-2...,...

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Forum Post: RE: [AHB eVC]How to send transfers with no IDLE cycles

I found the problem by setting the log verbosity to full. For some reason, some locked bursts are sent among all the bursts and an IDLE cycle was forced after each locked burst. Although I still don't...

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Forum Post: Invalid CDF choice

I have been using some skill code where an instance (pcell) master is replaced with another pcell. The parameters are not the same, so I assumed all the cdf parameters are set to the default value of...

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Forum Post: Allegro Skill - Convert Shape to Mechanical Symbol

Hi, Anyone please tell me how to convert the shape to a mechanical symbol. Note: It must not be ShapeSymbol. Regards, SkillUser

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Forum Post: How to use a custom netlist procedure (and OSSHNL-116 error)

Hello, I would like to ask some information on how to desing and use a custom netlist procedure. I have this scenario A cell called mycell_1 (of library mylib) has a schematic view. In the schematic, I...

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Forum Post: How to communicate impedance control information to the PCB house...

All, Our new designs have a lot of differential pairs running around our boards and I want to communicate this clearly to the board house so they can adjust tracks to their process to maintain...

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Forum Post: Existence of Layermap Purpose

Hi everyone, Is there any way to check the ".layermap" file for the existence a specific layer purpose? My goal is to check if given an input layer eg. M0 to check if the purpose "drawing" exists...

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Forum Post: RE: Existence of Layermap Purpose

Hi Everyone, I figured out how to do it, so I'll provide the solution here as a reference for anyone in the future. I used the functions as follows: tfId = techGetTechFile(ddGetObj("lib_techfile"))...

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Forum Post: how to specify different .dspf file for different instances of...

Hi, I'm wondering if it's possible to specify different .dspf file for different instances of the same cell for post layout sim? I know it's staightforward if there are extracted views, through...

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Forum Post: Problem running autorouter from within Allegro

I cannot invoke the autorouter using Allegro PCB Designer Performance16.6 license. Do I have to use the ORCAD PCB Designer Professional license to do this? Thanks, Dan

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Forum Post: RE: Problem running autorouter from within Allegro

By no means. What technique are you trying to get it to run?

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Forum Post: RE: How to communicate impedance control information to the PCB...

Nets can have "impedance_rule". A trick used by many fabricators is to set a line width to something easy to pick up on, for example, set a line to 4.876 mils. Then tell them that "all 4.876 mil lines...

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Forum Post: RE: How to communicate impedance control information to the PCB...

When you have custom layer stackup, fabs are not really keen on giving you these infos till you place an order. However usually there is no problem with poolable designs.

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Forum Post: [SV] Constraint solver issue

hello below is a class I use for randomize some settings of a ADC controller RTL. I got the following error stop -create -name Randomize -randomize Created stop Randomize assert (...

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Forum Post: RE: Extraction Tech File and LEF-Tech Map file for power grid libray

i think there was a way to capture the lef map created internally, but i don't recall the instructions. if you search COS you might find it. at least that one is easy to create with the lef and ict...

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Forum Post: RE: cdf Parameter access through OA scripting

Hi Oleg, The simple answer is no. It's in the definition of the CDF, which is stored in the cell metadata property bag (data.dm). It's not stored on the instance. Andrew.

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Forum Post: RE: explicit wire decalration by virtuoso verilog netlister

Off the top of my head, I don't know if this can be done - I can check. However, first I'd like to understand why you'd want this? It's not required in the Verilog language (whereas it is for...

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Forum Post: RE: skill mode download?

Hi Dan, I'm fairly sure there should be someone at Cadence that can supply the emacs SKILL mode to you but it is most likely out of date in that it will not contain the newer functions or reflect any...

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Forum Post: RE: Quickly schematic-viewing a gates file

SimVision has a number of layouts built in that you can specify at the command line, but sadly not a schematic-only one. You can define your own layouts though, so open sSimVision once (no design...

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